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US11600630B2ActiveUtilityPatentIndex 61

Integrated assemblies and methods of forming integrated assemblies

Assignee: MICRON TECHNOLOGY INCPriority: Aug 7, 2020Filed: Aug 7, 2020Granted: Mar 7, 2023
Est. expiryAug 7, 2040(~14.1 yrs left)· nominal 20-yr term from priority
Inventors:GREENLEE JORDAN DLOMELI NANCY MHOPKINS JOHN DCHEN JIEWEICHARY INDRA VFANG JUNSAMARA VLADIMIRLUO KAIMINGKLEIN RITA JLI XIAOSHAMANNA VINAYAK
H10P 52/402H10B 43/10G11C 16/0466H10B 41/27G11C 16/0408G11C 16/0483G11C 5/06G11C 5/025H10B 43/27H10B 43/30H10B 41/10H01L 21/30625H01L 27/11568H01L 27/11556H01L 27/11582
61
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Cited by
16
References
19
Claims

Abstract

Some embodiments include an integrated assembly having a source structure, and having a stack of alternating conductive levels and insulative levels over the source structure. Cell-material-pillars pass through the stack. The cell-material-pillars are arranged within a configuration which includes a first memory-block-region and a second memory-block-region. The cell-material-pillars include channel material which is electrically coupled with the source structure. Memory cells are along the conductive levels and include regions of the cell-material-pillars. A panel is between the first and second memory-block-regions. The panel has a first material configured as a container shape. The container shape defines opposing sides and a bottom of a cavity. The panel has a second material within the cavity. The second material is compositionally different from the first material. Some embodiments include methods of forming integrated assemblies.

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. An integrated assembly, comprising:
 a source structure; 
 a stack of alternating conductive levels and insulative levels over the source structure; 
 cell-material-pillars passing through the stack; the cell-material-pillars being arranged within a configuration which includes a first memory-block-region and a second memory-block-region; the cell-material-pillars including channel material; the channel material being electrically coupled with the source structure; 
 memory cells along the conductive levels and comprising regions of the cell-material-pillars; and 
 a panel between the first and second memory-block-regions; the panel having a first material configured as a container shape having a bottom surface contacting the source structure and having outer sidewalls, a width of the container shape being substantially uniform along an entirety of the outer sidewalls; the container shape, along a cross-section, defining opposing sides and a bottom of an interior cavity, an uppermost region of the interior cavity being wider than a remaining region of the interior cavity; the panel having a second material within the interior cavity, with the second material being compositionally different from the first material. 
 
     
     
       2. The integrated assembly of  claim 1  wherein the first material comprises conductive material. 
     
     
       3. The integrated assembly of  claim 2  wherein the first material comprises metal. 
     
     
       4. The integrated assembly of  claim 2  wherein the first material comprises W. 
     
     
       5. The integrated assembly of  claim 1  wherein the first material comprises semiconductor material. 
     
     
       6. The integrated assembly of  claim 5  wherein the first material comprises semiconductor oxide. 
     
     
       7. The integrated assembly of  claim 5  wherein the first material comprises one or both of Si and Ge. 
     
     
       8. The integrated assembly of  claim 1  wherein the first material comprises insulative material. 
     
     
       9. The integrated assembly of  claim 8  wherein the first material comprises one or both of silicon dioxide and silicon nitride. 
     
     
       10. The integrated assembly of  claim 8  wherein the first material and second materials both comprise silicon dioxide; and wherein the second material has a different density than the first material. 
     
     
       11. The integrated assembly of  claim 1  wherein the panel further includes a first sidewall spacer on one side of the first material and a second sidewall spacer on a second side of the first material, with the second side being in opposing relation to the first side along the cross-section. 
     
     
       12. The integrated assembly of  claim 11  wherein the first and second sidewall spacers comprise one or both of silicon dioxide and silicon nitride. 
     
     
       13. The integrated assembly of  claim 1  wherein the first material has an interior surface along the interior cavity, wherein the second material is a layer of oxide along the interior surface, and wherein a third material is over the layer of oxide and is spaced from the first material by at least the layer of oxide. 
     
     
       14. The integrated assembly of  claim 13  wherein the first material comprises one or more of Si, Ge and W. 
     
     
       15. The integrated assembly of  claim 13  wherein the third material is compositionally different from the first material. 
     
     
       16. The integrated assembly of  claim 13  wherein the third material is compositionally the same as the first material. 
     
     
       17. The integrated assembly of  claim 1  wherein the container shape has a first width along the cross-section; wherein the interior cavity has a second width along the cross-section; and wherein the second width is from about 5% to about 95% of the first width. 
     
     
       18. The integrated assembly of  claim 17  wherein the second width is from about 10% to about 50% of the first width. 
     
     
       19. The integrated assembly of  claim 1  wherein the memory cells are within a memory array region, and further comprising a staircase region proximate the memory array region; and wherein the panel extends into both the memory array region and the staircase region.

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