US11942403B2ActiveUtilityA1

Integrated circuit package and method

81
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Sep 21, 2018Filed: Nov 4, 2022Granted: Mar 26, 2024
Est. expirySep 21, 2038(~12.2 yrs left)· nominal 20-yr term from priority
H10P 54/00H10P 52/00H10P 50/642H10W 90/00H10W 74/129H10W 74/014H10W 72/0198H10W 72/90H10W 72/072H10W 70/635H10W 20/49H10W 74/10H10W 74/40H10W 76/12H10W 74/142H10W 74/15H10W 72/07327H10W 72/073H10W 72/241H10W 80/312H10W 80/327H10W 80/102H10W 72/321H10W 72/07352H10W 72/354H10W 72/385H10W 90/724H10W 90/722H10W 72/252H10W 72/222H10W 72/01235H10W 72/01225H10W 72/01238H10W 90/734H10W 72/334H10W 72/07353H10W 70/611H10W 70/095H10W 70/652H10W 70/60H10W 70/05H10W 72/019H10W 20/484H10W 76/47H10W 76/60H10W 74/012H10W 90/701H10W 70/698H10W 76/05H01L 23/49811H01L 21/304H01L 21/30604H01L 21/561H01L 21/78H01L 23/3114H01L 23/49827H01L 24/09H01L 24/81H01L 24/97H01L 25/0652
81
PatentIndex Score
0
Cited by
30
References
20
Claims

Abstract

In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A package comprising:
 metal interconnects disposed over a substrate; 
 a first integrated circuit device attached to the metal interconnects, the first integrated circuit device having a first edge and a second edge opposite the first edge; 
 an underfill having a first portion disposed beneath the first integrated circuit device and having a first fillet extending along the first edge of the first integrated circuit device, an edge of the first portion of the underfill being planar with the second edge of the first integrated circuit device; and 
 an encapsulant around the first integrated circuit device and the underfill, the encapsulant having a first surface planar with the edge of the first portion of the underfill and the second edge of the first integrated circuit device. 
 
     
     
       2. The package of  claim 1 , wherein the first fillet extends at least partially up the first edge of the first integrated circuit device. 
     
     
       3. The package of  claim 1  further comprising:
 a redistribution structure disposed under the substrate. 
 
     
     
       4. The package of  claim 3  further comprising:
 a package substrate connected to the redistribution structure. 
 
     
     
       5. The package of  claim 1 , wherein the first fillet is disposed at an edge region of the substrate. 
     
     
       6. The package of  claim 1  further comprising:
 conductive connectors attaching the first integrated circuit device to the metal interconnects, the underfill surrounding the conductive connectors. 
 
     
     
       7. The package of  claim 1  further comprising:
 a second integrated circuit device attached to the metal interconnects, the second integrated circuit device having a first edge and a second edge opposite the first edge, 
 wherein the underfill has a second portion disposed beneath the second integrated circuit device and has a second fillet extending along the first edge of the second integrated circuit device, and 
 wherein the encapsulant has a second surface planar with the edge of the second portion of the underfill and the second edge of the second integrated circuit device. 
 
     
     
       8. The package of  claim 7 , wherein the second edge of the second integrated circuit device faces the second edge of the first integrated circuit device. 
     
     
       9. A package comprising:
 a package substrate; 
 an interposer bonded to the package substrate by a solder joint between a first conductive bump of the interposer and a bond pad of the package substrate; 
 an first integrated circuit device bonded to the interposer by a solder joint between a conductive bump of the first integrated circuit device and a second conductive bump of the interposer, the first integrated circuit device having a first edge and a second edge; 
 an underfill having a first portion and a first fillet, the first portion of the underfill disposed between the first integrated circuit device and the interposer, an edge of the first portion of the underfill disposed at the first edge of the first integrated circuit device, the edge of the first portion of the underfill being perpendicular to a top surface of the interposer, the first fillet extending along the second edge of the first integrated circuit device; and 
 an encapsulant disposed around the underfill and the first integrated circuit device. 
 
     
     
       10. The package of  claim 9 , wherein the edge of the first portion of the underfill is planar with the first edge of the first integrated circuit device. 
     
     
       11. The package of  claim 9 , wherein the edge of the first portion of the underfill extends beyond the first edge of the first integrated circuit device. 
     
     
       12. The package of  claim 9 , wherein the first edge of the first integrated circuit device extends beyond the edge of the first portion of the underfill. 
     
     
       13. The package of  claim 9 , wherein the interposer comprises a redistribution structure, the redistribution structure comprising a polymer layer, conductive lines, and the first conductive bump. 
     
     
       14. The package of  claim 9  further comprising:
 a second integrated circuit device attached to the interposer, the second integrated circuit device having a first edge and a second edge, 
 wherein the underfill has a second portion and a second fillet, the second portion of the underfill disposed between the second integrated circuit device and the interposer, an edge of the second portion of the underfill disposed at the first edge of the second integrated circuit device, the second fillet disposed at the second edge of the second integrated circuit device, the encapsulant disposed between the first portion of the underfill and the second portion of the underfill. 
 
     
     
       15. The package of  claim 14 , wherein the first edge of the second integrated circuit device faces the first edge of the first integrated circuit device. 
     
     
       16. The package of  claim 14 , wherein the second edge of the second integrated circuit device and the second edge of the first integrated circuit device face the edge regions of the interposer. 
     
     
       17. A device comprising:
 a package substrate; 
 an interposer attached to the package substrate; 
 a plurality of integrated circuit devices attached to the interposer, the integrated circuit devices having an asymmetrical layout in a top view; 
 an underfill between the integrated circuit devices and the interposer, the underfill having first fillets, the first fillets extending along sides of the integrated circuit devices that are disposed along the edge regions of the interposer, the underfill having no fillets extending along sides of the integrated circuit devices that face one another; and 
 an encapsulant around the underfill and the integrated circuit devices, the encapsulant extending along the sides of the integrated circuit devices that face one another. 
 
     
     
       18. The device of  claim 17  further comprising:
 conductive connectors attaching the integrated circuit devices to the interposer, the underfill surrounding the conductive connectors. 
 
     
     
       19. The device of  claim 17 , wherein the interposer comprises:
 a semiconductor substrate having a first surface and a second surface opposite the first surface; 
 through vias extending from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate; and 
 an interconnect structure on the first surface of the semiconductor substrate, the interconnect structure connected to the through vias, the interconnect structure interconnecting the integrated circuit devices. 
 
     
     
       20. The device of  claim 17 , wherein the interposer interconnects the integrated circuit devices, and the integrated circuit devices comprise devices with different functions.

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