Protective liner layers in 3D memory structure
Abstract
A memory device includes a stack of gate electrode layers and interconnect layers arranged over a substrate. A first memory cell that is arranged over the substrate includes a first source/drain conductive lines and a second source/drain conductive line extending vertically through the stack of gate electrode layers. A channel layer and a memory layer are arranged on outer sidewalls of the first and second source/drain conductive lines. A first barrier structure is arranged between the first and second source/drain conductive lines. A first protective liner layer separates the first barrier structure from each of the first and second source/drain conductive lines. A second barrier structure is arranged on an opposite side of the first source/drain conductive line and is spaced apart from the first source/drain conductive line by a second protective liner layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method, comprising:
forming a stack of dummy gate electrode layers arranged between interconnect dielectric layers over a substrate;
forming a first trench within the stack of dummy gate electrode layers;
replacing the stack of dummy gate electrode layers with gate electrode layers;
forming a continuous memory layer, a continuous channel layer, and a continuous dielectric layer within the first trench;
filling remaining portions of the first trench with a fourth dielectric material;
forming fourth openings within the fourth dielectric material to form first barrier structures within the first trench;
forming a continuous protective liner layer within the fourth openings;
forming sacrificial structures within the fourth openings;
removing portions of the continuous protective liner layer and portions of the sacrificial structures to respectively form a first protective liner layer and fifth openings within the sacrificial structures, and leaving remaining portions of the sacrificial structures in place;
forming a second protective liner layer within the fifth openings of the sacrificial structures;
forming second barrier structures within remaining portions of the fifth openings; and
removing the remaining portions of the sacrificial structures and replacing the remaining portions of the sacrificial structures with a conductive material to form source/drain conductive lines surrounded by the first protective liner layer and the second protective liner layer.
2. The method of claim 1 , wherein the removing of the remaining portions of the sacrificial structures comprises one or more etchants, and wherein the first protective liner layer and the second protective liner layer each have a rate of removal by the one or more etchants that is slower than a rate of removal by the one or more etchants for each of the first barrier structures and the second barrier structures.
3. The method of claim 1 , wherein the first protective liner layer comprises a material different than a material of the first barrier structures, and wherein the second protective liner layer comprises a material different than the material of the first barrier structures.
4. The method of claim 1 , wherein the sacrificial structures comprise a material different than a material of each of the first barrier structures and the second barrier structures.
5. A method, comprising:
forming a first trench within a stack of dummy gate electrode layers;
forming a continuous memory layer, a continuous channel layer, and a fourth dielectric material within the first trench;
forming fourth openings within the fourth dielectric material;
forming sacrificial structures within the fourth openings;
removing portions of the sacrificial structures to respectively form fifth openings within the sacrificial structures, while leaving remaining portions of the sacrificial structures in place; and
removing the remaining portions of the sacrificial structures and replacing the remaining portions of the sacrificial structures with a conductive material to form source/drain conductive lines.
6. The method of claim 5 , further comprising: forming a continuous protective liner layer within the fourth openings.
7. The method of claim 6 , further comprising: removing portions of the continuous protective liner layer to form a first protective liner layer.
8. The method of claim 7 , further comprising: forming a second protective liner layer within the fifth openings of the sacrificial structures.
9. The method of claim 8 , wherein forming the fourth openings within the fourth dielectric material forms first barrier structures within the first trench; and further comprising:
forming second barrier structures within remaining portions of the fifth openings.
10. The method of claim 9 , wherein the removing of the remaining portions of the sacrificial structures comprises one or more etchants, and wherein the first protective liner layer and the second protective liner layer each have a rate of removal by the one or more etchants that is slower than a rate of removal by the one or more etchants for each of the first barrier structures and the second barrier structures.
11. The method of claim 9 , wherein the first protective liner layer comprises a material different than a material of the first barrier structures, and wherein the second protective liner layer comprises a material different than the material of the first barrier structures.
12. The method of claim 9 , wherein the sacrificial structures comprise a material different than a material of each of the first barrier structures and the second barrier structures.
13. The method of claim 9 , wherein the source/drain conductive lines are surrounded by the first protective liner layer and the second protective liner layer.
14. The method of claim 5 , wherein the stack of dummy gate electrode layers are arranged between interconnect dielectric layers over a substrate.
15. A method, comprising:
forming a first trench within a stack of dummy gate electrode layers;
forming a continuous memory layer and a continuous channel layer in the first trench, and filling the first trench with a fourth dielectric material;
forming a fourth opening within the fourth dielectric material, and thereby forming at least one first barrier structures within the first trench;
forming a continuous protective liner layer within the fourth opening;
forming a sacrificial structure within the fourth opening;
removing a portion of the continuous protective liner layer and a portion of the sacrificial structure to respectively form a first protective liner layer and a fifth opening within the sacrificial structure, and leaving a remainder of the sacrificial structure in place;
forming a second protective liner layer within the fifth opening of the sacrificial structure;
forming a second barrier structures within a remaining portion of the fifth opening; and
replacing the remainder of the sacrificial structure with a conductive material to form a source/drain conductive line surrounded by the first protective liner layer and the second protective liner layer.
16. The method of claim 15 , wherein the removing of the portion of the sacrificial structure comprises one or more etchants, and wherein the first protective liner layer and the second protective liner layer each have a rate of removal by the one or more etchants that is slower than a rate of removal by the one or more etchants for each of the at least one first barrier structures and the second barrier structure.
17. The method of claim 15 , wherein the first protective liner layer comprises a material different than a material of the at least one first barrier structure, and
wherein the second protective liner layer comprises a material different than the material of the at least one first barrier structure.
18. The method of claim 15 , wherein the sacrificial structure comprises a material different than a material of each of the at least one first barrier structure and the second barrier structure.
19. The method of claim 15 , wherein the at least one first barrier structure comprises a nitride, a carbide, an oxide, borosilicate glass (BSG), phosphoric silicate glass (PSG), borophosphosilicate glass (BPSG), or a low-k oxide.
20. The method of claim 19 , wherein the first protective liner layer comprises a metal or a metal oxide.Cited by (0)
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