Epitaxial source/drain back-side device contact structures with wrap around metallization and protective conformal liner

Abstract

Back-side transistor contacts that wrap around a portion of source and/or drain semiconductor bodies, related transistor structures, integrated circuits, systems, and methods of fabrication are disclosed. Such back-side transistor contacts are coupled to a top and a side of the source and/or drain semiconductor and extend to back-side interconnects. Coupling to top and side surfaces of the source and/or drain semiconductor reduces contact resistance and extending the metallization along the side reduces transistor cell size for improve device density.

What is claimed is: 
     
         1 . An apparatus, comprising:
 a transistor structure having a front-side and a back-side, the transistor structure comprising a channel semiconductor between a source semiconductor and a drain semiconductor;   metallization in contact with a first region of a top surface and a first side surface of one of the source semiconductor or the drain semiconductor and in contact with a back-side metal interconnect over the back-side, wherein the top surface is proximal to the front-side;   a conformal liner material on a second region of the top surface and a second side surface, opposite the first side surface, of the one of the source semiconductor or the drain semiconductor, wherein the conformal liner material has a substantially constant thickness along an entirety of the second side surface extending to a bottom of the one of the source semiconductor or the drain semiconductor, and wherein the metallization is in contact with the conformal liner material over the top surface of the one of the source semiconductor or the drain semiconductor; and   a dielectric material immediately adjacent the conformal liner material.   
     
     
         2 . The apparatus of  claim 1 , wherein the metallization comprises a third side surface on the first side surface of the one of the source semiconductor or the drain semiconductor and a fourth side surface opposite the third side surface, wherein the conformal liner material is on the fourth side surface of the metallization. 
     
     
         3 . The apparatus of  claim 1 , wherein the one of the source semiconductor or the drain semiconductor in contact with the metallization comprises silicon and germanium and the conformal liner material comprises silicon and nitrogen. 
     
     
         4 . The apparatus of  claim 1 , wherein the metallization extends over and on the conformal liner material on a portion of the dielectric material, and wherein the metallization is a continuous metallization material absent a grain boundary therein. 
     
     
         5 . The apparatus of  claim 1 , wherein the first region of the top surface is recessed below the second region of the top surface to form a sidewall at an interface between the metallization and the conformal liner material. 
     
     
         6 . The apparatus of  claim 1 , wherein the metallization is in contact with the source semiconductor, the apparatus further comprises a second metallization in contact with the drain semiconductor, the metallization and second metallization both comprise a same composition, and wherein the second metallization is in contact with a front-side metal layer and absent a contact with a back-side metal layer. 
     
     
         7 . The apparatus of  claim 6 , further comprising a second dielectric material between a top surface of the metallization and the front-side metal layer, wherein the conformal liner material is on a portion of the drain semiconductor. 
     
     
         8 . The apparatus of  claim 1 , wherein the channel semiconductor comprises a first nanoribbon of a plurality of nanoribbons of the transistor structure. 
     
     
         9 . The apparatus of  claim 1 , further comprising:
 a power supply; and   an integrated circuit die coupled to the power supply, the integrated circuit die comprising the transistor structure, the metallization, the conformal liner material, and the dielectric material.   
     
     
         10 . An apparatus, comprising:
 a transistor structure having a front-side and a back-side, the transistor structure comprising a channel semiconductor between a source semiconductor and a drain semiconductor;   metallization in contact with a first region of a top surface of one of the source semiconductor or the drain semiconductor, in contact with a first side surface of the one of the source semiconductor or the drain semiconductor, and in contact with a back-side metal interconnect over the back-side, wherein the top surface is proximal to the front-side;   a conformal liner material, having a substantially constant thickness, in contact with a second region of the top surface of the one of the source semiconductor or the drain semiconductor immediate adjacent the first region, and in contact with a second side surface, opposite the first side surface, of the one of the source semiconductor or the drain semiconductor; and   a dielectric material immediately adjacent the conformal liner material.   
     
     
         11 . The apparatus of  claim 10 , wherein the metallization comprises a third side surface on the first side surface of the one of the source semiconductor or the drain semiconductor and a fourth side surface opposite the third side surface, wherein the conformal liner material is on the fourth side surface of the metallization. 
     
     
         12 . The apparatus of  claim 10 , wherein the one of the source semiconductor or the drain semiconductor in contact with the metallization comprises silicon and germanium and the conformal liner material comprises silicon and nitrogen. 
     
     
         13 . The apparatus of  claim 10 , wherein the metallization is in contact with the conformal liner material over the top surface of the one of the source semiconductor or the drain semiconductor. 
     
     
         14 . The apparatus of  claim 13 , wherein the first region of the top surface is recessed below the second region of the top surface to form a sidewall at an interface between the metallization and the conformal liner material. 
     
     
         15 . The apparatus of  claim 10 , wherein the metallization is in contact with the source semiconductor, the apparatus further comprises a second metallization in contact with the drain semiconductor, the metallization and second metallization both comprise a same composition, and wherein the second metallization is in contact with a front-side metal layer and absent a contact with a back-side metal layer. 
     
     
         16 . The apparatus of  claim 15 , further comprising a second dielectric material between a top surface of the metallization and the front-side metal layer. 
     
     
         17 . The apparatus of  claim 16 , wherein the conformal liner material is on a portion of the drain semiconductor. 
     
     
         18 . The apparatus of  claim 10 , wherein the channel semiconductor comprises a first nanoribbon of a plurality of nanoribbons of the transistor structure. 
     
     
         19 . The apparatus of  claim 10 , further comprising:
 a power supply; and   an integrated circuit die coupled to the power supply, the integrated circuit die comprising the transistor structure, the metallization, the conformal liner material, and the dielectric material.