New fuse structure

Abstract

An electrical fuse and a method of forming the same are presented. A first-layer conductive line is formed over a base material. A via is formed over the first-layer conductive line. The via preferably comprises a barrier layer and a conductive material. A second-layer conductive line is formed over the via. A first external pad is formed coupling to the first-layer conductive line. A second external pad is formed coupling to the second-layer conductive line. The via, the first conductive line and the second conductive line are adapted to be an electrical fuse. The electrical fuse can be burned out by applying a current. The vertical structure of the preferred embodiment is suitable to be formed in any layer.

1 . An electrical fuse comprising: 
 a first conductive layer;    a second conductive layer; and    a via coupled between the first conductive layer and the second conductive layer wherein at least one of the via, the first conductive layer and the second conductive layer are adapted to be an electrical fuse.    
   
   
       2 . The electrical fuse of  claim 1  wherein the electrical fuse further comprises a first external pad coupled to the first conductive layer; and a second external pad coupled to the second conductive layer.  
   
   
       3 . The electrical fuse of  claim 1  further comprising: 
 a third conductive layer; and    a plurality of vias coupled between the second conductive layer and the third conductive layer.    
   
   
       4 . The electrical fuse of  claim 3  further comprising: 
 an nMOS transistor having a drain coupled to the third conductive layer; and    a source coupled to a first power supply node wherein the first conductive layer is coupled to a second power supply node.    
   
   
       5 . The electrical fuse of  claim 1  wherein the via has a cross sectional area of between about 10 −4  μm 2  and about 1 μm 2 .  
   
   
       6 . The electrical fuse of  claim 1  wherein the via has a height of between about 500 Å and about 1 μm.  
   
   
       7 . The electrical fuse of  claim 1  wherein the via comprises a conductive material and a barrier layer outside the conductive material.  
   
   
       8 . The electrical fuse of  claim 1  further comprising: 
 a plurality of additional vias each in a different layer; and    a plurality of additional conductive layers wherein the additional vias are coupled in series and each of the additional vias is coupled between two of the additional conductive layers.    
   
   
       9 . The electrical fuse of  claim 8  further comprising: 
 a plurality of external pads each coupled to one of the additional conductive layers.    
   
   
       10 . The electrical fuse of  claim 1  wherein the first conductive layer, the second conductive layer and the via comprise copper and are formed by a method selected from the group consisting of single damascene process and dual damascene process.  
   
   
       11 . The electrical fuse of  claim 1  wherein the via is misaligned to the first and/or the second conductive layers.  
   
   
       12 . The electrical fuse of  claim 12  wherein the misalignment is smaller than about ¾ of the via dimension in the misalignment direction.  
   
   
       13 . A semiconductor device comprising: 
 a burned-out electrical fuse comprising: 
 a first conductive layer;  
 a second conductive layer; and  
 a via coupled between the first conductive layer and the second conductive layer and adapted to be a fuse.  
   
   
   
       14 . The electrical fuse of  claim 13  wherein the electrical fuse comprises a first external pad coupled to the first conductive layer; a second external pad coupled to the second conductive layer; and an electrical discontinuity in the via or adjacent the interfaces between the via and the first and the second conductive layers.  
   
   
       15 . The electrical fuse of  claim 14  further comprising a plurality of vias between the first and the second external pads.  
   
   
       16 . The electrical fuse of  claim 13  further comprising: 
 a third conductive layer; and    a plurality of vias coupled between the second conductive layer and the third conductive layer wherein the vias are not burned-out.    
   
   
       17 . The electrical fuse of  claim 13  wherein the via has a cross sectional area of between about 10 −4  μm 2  and about 1 μm 2 .  
   
   
       18 . A semiconductor device comprising: 
 an electrical circuit;    a redundant circuit having a redundant design of the electrical circuit;    a first conductive layer;    a second conductive layer; and    a first via coupled between the first conductive layer and the second conductive layer wherein one of the first and second conductive layers is coupled to the redundant circuit and wherein the first via, the first conductive layer and the second conductive layer are adapted to be an electrical fuse.    
   
   
       19 . The semiconductor device of  claim 18  further comprises a first external pad coupled to the first conductive layer; and a second external pad coupled to the second conductive layer.  
   
   
       20 . The semiconductor device of  claim 18  further comprising: 
 a second via coupled in parallel with the electrical circuit;    wherein the second via is coupled between a third conductive layer and a fourth conductive layer;    wherein the second via, the third conductive layer and the fourth conductive layer are adapted to be an electrical fuse;    a third external pad coupled to the third conductive layer; and    a fourth external pad coupled to the fourth conductive layer.