Magnetic tunnel junction structure having an oxidized buffer layer and method of fabricating the same

Abstract

There are provided a magnetic tunnel junction structure and a method of fabricating the same. The magnetic tunnel junction structure includes a lower electrode, a lower magnetic layer pattern and a tunnel layer pattern, which are sequentially formed on the lower electrode. The magnetic tunnel junction structure further includes an upper magnetic layer pattern, a buffer layer pattern, and an upper electrode, which are sequentially formed on a portion of the tunnel layer pattern. The sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer, and the sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer. The depletion of the upper magnetic layer pattern and the lower magnetic layer pattern in the magnetic tunnel junction region can be prevented by the oxidized buffer layer.

1 . A structure comprising: 
 a lower electrode;    a lower magnetic layer pattern and a tunnel layer pattern sequentially stacked on the lower electrode; and    an upper magnetic layer pattern, a buffer layer pattern, and an upper electrode sequentially stacked on a portion of the tunnel layer pattern, wherein a sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer overlying the tunnel layer pattern, and wherein a sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer overlying the oxidized upper magnetic layer.    
   
   
       2 . The structure of  claim 1 , wherein the lower magnetic layer pattern comprises a pinning layer and a pinned layer formed on the pinning layer.  
   
   
       3 . The structure of  claim 1 , wherein the upper magnetic layer pattern comprises ferromagnetic material.  
   
   
       4 . The structure of  claim 1 , wherein the buffer layer pattern is formed of at least one material layer selected from the group consisting of Ta, Ti, and TiN.  
   
   
       5 . The structure of  claim 1 , wherein the buffer layer pattern has a thickness of about 100 Å.  
   
   
       6 . The structure of  claim 1 , wherein the buffer layer pattern is directly below the upper electrode.  
   
   
       7 . The structure of  claim 1 , wherein the buffer layer pattern and the oxidized buffer layer are disposed at a first level.  
   
   
       8 . The structure of  claim 1 , wherein the upper magnetic layer pattern and the oxidized upper magnetic layer are disposed at a second level.  
   
   
       9 . A memory structure comprising: 
 a lower magnetic layer pattern;    an upper magnetic layer pattern;    a tunnel layer between the lower and upper magnetic layer patterns;    a buffer layer pattern overlying the upper magnetic layer pattern, wherein a sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer; and    an upper electrode overlying the buffer layer pattern.    
   
   
       10 . The memory structure of  claim 9 , wherein the buffer layer pattern and the oxidized buffer layer are at a first level over the lower magnetic layer pattern.  
   
   
       11 . The memory structure of  claim 9 , wherein a sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer.  
   
   
       12 . The memory structure of  claim 11 , wherein the upper magnetic layer pattern and the oxidized upper magnetic layer are at a second level over the lower magnetic layer pattern.  
   
   
       13 . The memory structure of  claim 11 , wherein the oxidized upper magnetic layer overlies the tunnel layer.  
   
   
       14 . The memory structure of  claim 11 , wherein the oxidized buffer layer overlies the oxidized upper magnetic layer.  
   
   
       15 . The memory structure of  claim 9 , wherein the buffer layer pattern is formed of at least one material layer selected from the group consisting of Ta, Ti, and TiN.  
   
   
       16 . The memory structure of  claim 9 , wherein the buffer layer pattern has a thickness of about 100 Å.  
   
   
       17 . The memory structure of  claim 9 , wherein buffer layer pattern and the upper magnetic layer pattern are aligned with respect to the upper electrode.  
   
   
       18 . The memory structure of  claim 9 , further comprising an insulating layer overlying the oxidized buffer layer and surrounding the upper electrode.  
   
   
       19 . A memory structure comprising: 
 a lower magnetic layer pattern overlying a substrate;    an upper magnetic layer pattern;    a tunnel layer between the lower and upper magnetic layer patterns;    a buffer layer pattern overlying the upper magnetic layer pattern; and    an upper electrode overlying the buffer layer pattern,    wherein a sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer overlying the tunnel layer.    
   
   
       20 . The memory structure of  claim 19 , wherein a sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer overlying the oxidized upper magnetic layer.