Semiconductor constructions

Abstract

The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.

1 - 26 . (canceled)  
   
   
       27 : A semiconductor construction, comprising: 
 a semiconductor material; and    an electrically insulative material structure extending into the semiconductor material, the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.    
   
   
       28 : The construction of  claim 27  wherein the semiconductor material comprises silicon.  
   
   
       29 : The construction of  claim 27  wherein the semiconductor material consists essentially of silicon.  
   
   
       30 : The construction of  claim 29  wherein the insulative material consists essentially of silicon dioxide.  
   
   
       31 : The construction of  claim 27  further comprising: 
 a first transistor device on one side of the electrically insulative structure, the first transistor device having a pair of first source/drain regions extending into the semiconductor material;    a second transistor device on an opposing side of the electrically insulative structure from the first transistor device, the second transistor device having a pair of second source/drain regions extending into the semiconductor material; and    the insulative material providing electrical isolation between the first and second transistor devices.    
   
   
       32 : The construction of  claim 31  wherein one of the first source/drain regions extends to the bulbous bottom region.  
   
   
       33 : The construction of  claim 32  wherein one of the second source/drain regions extends to the bulbous bottom region.  
   
   
       34 : The construction of  claim 31  wherein the first and second source/drain regions are entirely above the bulbous bottom region.