US2008142994A1PendingUtilityA1

Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps

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Assignee: LU SZU WEIPriority: Mar 17, 2005Filed: Feb 25, 2008Published: Jun 19, 2008
Est. expiryMar 17, 2025(expired)· nominal 20-yr term from priority
H10W 72/9415H10W 72/934H10W 72/251H10W 90/701H10W 74/129H10W 72/952H10W 72/923H10W 72/20
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Claims

Abstract

A semiconductor package assembly comprises a first conductive pad on a semiconductor substrate; a second conductive pad on a package substrate; a bump physically coupled between the first conductive pad and the second conductive pad, wherein the bump is substantially lead-free or high-lead-containing; the bump has a first interface with the first conductive pad, the first interface having a first linear dimension; the bump has a second interface with the second conductive pad, the second interface having a second linear dimension; and wherein the ratio of the first linear dimension and the second linear dimension is between about 0.7 and about 1.7.

Claims

exact text as granted — not AI-modified
1 . A semiconductor package assembly comprising:
 a first conductive pad on a semiconductor substrate;   a second conductive pad on a package substrate;   a substantially high-lead-containing bump physically coupled between the semiconductor substrate and the package substrate;   wherein the bump has a first interface with the first conductive pad, the first interface having a first linear dimension;   wherein the bump has a second interface with the second conductive pad, the second interface having a second linear dimension; and   wherein the first linear dimension and the second linear dimension has a ratio of between about 0.7 and about 1.7.   
   
   
       2 . The semiconductor package assembly of  claim 1  wherein the semiconductor substrate comprises at least one low-k dielectric layer having a k value of less than about 3.3. 
   
   
       3 . The semiconductor package assembly of  claim 1  wherein the bump comprises greater than about 80 percent lead. 
   
   
       4 . The semiconductor package assembly of  claim 1  wherein the ratio of the first linear dimension and the second linear dimension is between about 0.8 and about 1.5. 
   
   
       5 . The semiconductor package assembly of  claim 4  wherein the ratio of the first linear dimension and the second linear dimension is between about 0.9 and about 1.3. 
   
   
       6 . The semiconductor package assembly of  claim 1  wherein the second conductive pad comprises a material selected from the group consisting essentially of copper, aluminum, and combinations thereof. 
   
   
       7 . The semiconductor package assembly of  claim 1  wherein the first and second linear dimensions are between about 30 μm and 200 μm, respectively. 
   
   
       8 . The semiconductor package assembly of  claim 1  wherein the bump has a height of between about 30 μm and about 200 μm, wherein the height and the first linear dimension has a ratio of between about 0.5 and about 1.0, and wherein the height and the second linear dimension has a ratio of between about 0.5 and about 1.0.

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