Method of manufacturing a semiconductor device having an even coating thickness using electro-less plating and related device

Abstract

A method of manufacturing a semiconductor device includes forming a diffusion barrier layer on a substrate, and forming at least two features on the substrate such that the diffusion barrier layer is respectively disposed between each feature and the substrate and contacts the at least two features. A first impurity region of the substrate contains impurities of a first type, a second impurity region of the substrate contains impurities of a second type, different from the first type, a first feature of the at least two features is in the first impurity region, and a second feature of the at least two features is in the second impurity region, such that the second feature is electrically isolated from first feature by the different impurity regions.

1 - 13 . (canceled) 
     
     
         14 . A semiconductor device, comprising:
 a substrate;   at least two features on the substrate, each including an outer conductive layer; and   a diffusion barrier layer respectively disposed between each feature and the substrate, wherein:   a first impurity region of the substrate contains impurities of a first type,   a second impurity region of the substrate contains impurities of a second type, different from the first type,   a first feature of the at least two features is in the first impurity region,   a second feature of the at least two features is in the second impurity region, such that the second feature is electrically isolated from first feature by the different impurity regions, and   each respective diffusion barrier layer extends laterally to an outer edge of the corresponding conductive layer and is exposed by the corresponding conductive layer.   
     
     
         15 . The semiconductor device as claimed in  claim 14 , wherein the conductive layer contacts a top surface of the diffusion barrier layer. 
     
     
         16 . The semiconductor device as claimed in  claim 14 , wherein each feature includes a core material having a different composition from the conductive layer. 
     
     
         17 . The semiconductor device as claimed in  claim 16 , wherein the core material includes one or more of copper or nickel. 
     
     
         18 . The semiconductor device as claimed in  claim 14 , wherein the conductive layer includes one or more of nickel, gold, palladium, tin, or indium. 
     
     
         19 . The semiconductor device as claimed in  claim 14 , wherein the diffusion barrier layer includes one or more of titanium, chromium, or aluminum. 
     
     
         20 . The semiconductor device as claimed in  claim 19 , wherein the diffusion barrier layer includes one or more of a titanium-nitrogen compound or a titanium-tungsten compound. 
     
     
         21 . The semiconductor device as claimed in  claim 14 , wherein the at least two features are bumps that are configured to provide electrical signals between the semiconductor device and a second substrate. 
     
     
         22 . The semiconductor device as claimed in  claim 14 , wherein the at least two features are wiring lines. 
     
     
         23 . A display device, comprising:
 a display and a display driver integrated circuit coupled to the display, wherein:   the display is configured to reproduce an image in response to signals provided by the display driver integrated circuit, and   the display driver integrated circuit includes:   a substrate;   at least two features on the substrate, each including an outer conductive layer; and   a diffusion barrier layer respectively disposed between each feature and the substrate, wherein:   a first impurity region of the substrate contains impurities of a first type,   a second impurity region of the substrate contains impurities of a second type, different from the first type,   a first feature of the at least two features is in the first impurity region,   a second feature of the at least two features is in the second impurity region, such that the second feature is electrically isolated from first feature by the different impurity regions, and   each respective diffusion barrier layer extends laterally to an outer edge of the corresponding conductive layer and is exposed by the corresponding conductive layer.   
     
     
         24 . A method of manufacturing a semiconductor device, comprising:
 forming a diffusion barrier layer on a substrate;   forming at least two features on the substrate such that the diffusion barrier layer is respectively disposed between each feature and the substrate, the diffusion barrier layer electrically connecting the at least two features;   electro-less plating an outer conductive layer on the at least two features while the at least two features are electrically connected by the diffusion barrier layer; and   selectively removing the diffusion barrier layer so as to interrupt the electrical connection.   
     
     
         25 . A semiconductor device, comprising:
 a substrate;   a first feature and a second feature on the substrate;   a first diffusion barrier between the substrate and the first feature;   a first conductive layer on the first feature;   a second diffusion barrier between the substrate and the second feature; and   a second conductive layer on the second feature, wherein:   the first conductive layer contacts a top surface of the first diffusion barrier, and   the second conductive layer contacts a top surface of the second diffusion barrier.