Bonding structures and methods of forming bonding structures

Abstract

A semiconductor structure includes a first substrate and a second substrate bonded over the first substrate. The first substrate includes a passivation layer formed over the first substrate. The passivation layer includes at least one first opening exposing a first bonding pad formed over the first substrate. The second substrate includes at least one second opening aligned with and facing the first opening.

1 . A semiconductor structure, comprising:
 a first substrate comprising a passivation layer formed thereover, the passivation layer comprising at least one first opening exposing a bonding pad formed over the first substrate; and   a second substrate bonded over the passivation layer, the second substrate comprising at least one second opening substantially aligned with and facing the first opening.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein the second substrate has a thickness between about 5 μm and about 100 μm. 
     
     
         3 . The semiconductor structure of  claim 1 , wherein the second opening is substantially equal to or larger than the first opening in area. 
     
     
         4 . The semiconductor structure of  claim 1  further comprising a third substrate upon which the first substrate is mounted, the third substrate comprising at least one second bonding pad formed thereover, wherein the first bonding pad is wire bonded to the second bonding pad through the first opening and the second opening. 
     
     
         5 . The semiconductor structure of  claim 4 , wherein the first substrate further comprises at least one through wafer via (TWV) formed therein, and the second substrate is bonded over the passivation layer with a fusion bond. 
     
     
         6 . The semiconductor structure of  claim 4  further comprising a fourth substrate mounted over the second substrate, wherein the second substrate serves as a spacer between the fourth substrate and the first substrate. 
     
     
         7 . The semiconductor structure of  claim 1 , wherein the second opening extends completely through the second substrate and at least one conductive structure is formed within the first opening and second opening, wherein the conductive structure is flip bonded over a third substrate. 
     
     
         8 . The semiconductor structure of  claim 7  further comprising at least one bump formed over the conductive structure. 
     
     
         9 . The semiconductor structure of  claim 1 , wherein the second opening extends beyond the first opening to an edge of the second substrate. 
     
     
         10 . The semiconductor structure of  claim 1 , wherein the first substrate comprises at least one through wafer via (TWV) formed therein; and
 the second substrate is bonded over the passivation layer with a fusion bond.   
     
     
         11 . The semiconductor structure of  claim 10 , wherein the second substrate has a thickness between about 5 μm and about 100 μm. 
     
     
         12 . The semiconductor structure of  claim 10  further comprising a third substrate upon which the first substrate is mounted, the third substrate comprising at least one second bonding pad formed thereover, wherein the bonding pad exposed in the first opening is wire bonded to the second bonding pad through the first opening and the second opening. 
     
     
         13 . A semiconductor structure, comprising:
 a first substrate;   a passivation layer formed over the first substrate, the passivation layer comprising at least one first opening in which a first bonding pad is formed, the first opening having a first sidewall surrounding the first opening;   a dummy substrate formed of a separate piece of material from the first substrate and the passivation layer, the dummy substrate bonded over the passivation layer, the dummy substrate comprising at least one second opening therein, the second opening having a second sidewall extending from a surface of the dummy substrate facing the passivation layer to a face of the dummy substrate opposite the passivation layer, the second opening aligned with and facing the first opening;   the first substrate having a planarized surface facing away from the dummy substrate; and   the dummy substrate having a planarized surface that exposes the first opening through the second opening.   
     
     
         14 . The semiconductor structure of  claim 13  further comprising
 a third substrate upon which the first substrate is mounted; and 
 a fourth substrate mounted over the dummy substrate, wherein the dummy substrate serves as a spacer between the fourth substrate and the first substrate. 
 
     
     
         15 . The semiconductor structure of  claim 13 , wherein the second opening is substantially equal to or larger than the first opening in area. 
     
     
         16 . The semiconductor structure of  claim 13 , wherein the first substrate further comprises at least one through wafer via (TWV) formed therein, and the dummy substrate is bonded over the passivation layer with a fusion bond. 
     
     
         17 . The semiconductor structure of  claim 13 , wherein at least one conductive structure is formed within the first opening and second opening, further comprising a third substrate over which the conductive structure is flip bonded. 
     
     
         18 . A semiconductor structure, comprising:
 a first substrate;   a passivation layer formed over the first substrate, the passivation layer comprising at least one first opening in which a first bonding pad is formed, the first opening having a first sidewall surrounding the first opening;   a dummy substrate formed of a separate piece of material from the first substrate and the passivation layer, the dummy substrate bonded over the passivation layer, the dummy substrate having a first surface facing the passivation layer and a second surface opposite the first surface, the dummy substrate comprising at least one second opening therein, the second opening having a second sidewall extending from the first surface partially through the dummy substrate, the second opening having a base between the first and second surfaces, the second opening aligned with and facing the first opening;   the first substrate having a planarized surface facing away from the dummy substrate.   
     
     
         19 . The semiconductor structure of  claim 18 , wherein the second opening is substantially equal to or larger than the first opening in area. 
     
     
         20 . The semiconductor structure of  claim 18 , wherein the first substrate further comprises at least one through wafer via (TWV) formed therein, and the dummy substrate is bonded over the passivation layer with a fusion bond.