Finfet device having a strained region

Abstract

A method of fabricating a semiconductor device includes providing a substrate having a fin disposed thereon. A gate structure is formed on the fin. The gate structure interfaces at least two sides of the fin. A stress film is formed on the substrate including on the fin. The substrate including the stress film is annealed. The annealing provides a tensile strain in a channel region of the fin. For example, a compressive strain in the stress film may be transferred to form a tensile stress in the channel region of the fin.

What is claimed is: 
     
         1 . A method of fabricating a semiconductor device, comprising:
 providing a substrate having a fin disposed thereon;   forming a gate structure on the fin, wherein the gate structure interfaces at least two sides of the fin;   depositing a stress film on the substrate; and   annealing the substrate including the stress film, wherein the annealing provides a tensile strain in a channel region of the fin.   
     
     
         2 . The method of  claim 1 , wherein the stress film is silicon nitride. 
     
     
         3 . The method of  claim 1 , further comprising:
 forming a buffer layer prior to depositing the stress film.   
     
     
         4 . The method of  claim 1 , further comprising:
 stripping the stress film from the substrate after the annealing.   
     
     
         5 . The method of  claim 1 , wherein the annealing includes at least one of a rapid thermal anneal, a furnace anneal, a flash anneal, and a laser anneal. 
     
     
         6 . The method of  claim 1 , further comprising:
 performing a pre-amorphous implant (PAI) prior to depositing the stress film.   
     
     
         7 . The method of  claim 6 , further comprising:
 forming a buffer layer prior to performing the PAI.   
     
     
         8 . The method of  claim 6 , further comprising:
 forming a buffer layer after performing the PAI, wherein the buffer layer underlying the stress film.   
     
     
         9 . A method of fabricating a fin-type field effect transistor, comprising:
 providing a substrate having a plurality of fins;   growing an epitaxial region on the substrate, wherein the epitaxial region interfaces with each of the plurality of fins;   performing a pre-amorphous implantation (PAI) process on the epitaxial region;   forming a compressive layer on the epitaxial region after the PAI process;   treating the substrate and the compressive layer, wherein the treating transfers a stress from the compressive layer to the epitaxial region.   
     
     
         10 . The method of  claim 9 , wherein the transferred stress provides a tensile strain in a channel region of each of the plurality of fins. 
     
     
         11 . The method of  claim 9 , wherein the treating includes an anneal selected from the group consisting of a rapid thermal anneal (RTA), a laser anneal, a flash anneal, and a furnace anneal. 
     
     
         12 . The method of  claim 9 , further comprising:
 stripping the compressive layer after the treating the substrate.   
     
     
         13 . The method of  claim 12 , further comprising:
 implanting the epitaxial region to form one of an n-type and a p-type region.   
     
     
         14 . The method of  claim 9 , further comprising:
 forming a buffer layer on the epitaxial region prior to performing the PAI process.   
     
     
         15 . The method of  claim 9 , further comprising:
 forming a buffer layer on the epitaxial region and underlying the stress layer, wherein the forming the buffer layer is performed after performing the PAI process.   
     
     
         16 . The method of  claim 9 , further comprising:
 performing a junction implant process on the epitaxial region prior to forming the stress layer.   
     
     
         17 . A method comprising:
 providing a fin-type semiconductor device;   forming a compressive stress layer on the fin-type semiconductor device;   transferring a stress from the compressive stress layer to a region of a fin of the fin-type semiconductor device; and   removing the compressive stress layer after the transferring the stress.   
     
     
         18 . The method of  claim 17 , wherein the transferring the stress includes providing a tensile stress to a channel region of the fin-type semiconductor device. 
     
     
         19 . The method of  claim 17 , wherein the compressive stress layer is silicon nitride. 
     
     
         20 . The method of  claim 17 , wherein the transferring the stress includes annealing the fin-type semiconductor device.