Techniques and configurations to impart strain to integrated circuit devices

Abstract

Embodiments of the present disclosure describe techniques and configurations to impart strain to integrated circuit devices such as horizontal field effect transistors. An integrated circuit device includes a semiconductor substrate, a quantum well channel coupled with the semiconductor substrate, a source structure coupled with the quantum well channel, a drain structure coupled with the quantum well channel and a strain-inducing film disposed on and in direct contact with material of the source structure and the drain structure to reduce resistance of the quantum well channel by imparting a tensile or compressive strain on the quantum well channel, wherein the quantum well channel is disposed between the strain-inducing film and the semiconductor substrate. Other embodiments may be described and/or claimed.

What is claimed is: 
     
         1 . An apparatus comprising:
 a semiconductor substrate;   a quantum well channel coupled with the semiconductor substrate;   a source structure coupled with the quantum well channel;   a drain structure coupled with the quantum well channel; and   a strain-inducing film disposed on and in direct contact with material of the source structure and the drain structure to reduce resistance of the quantum well channel by imparting a tensile or compressive strain on the quantum well channel, wherein the quantum well channel is disposed between the strain-inducing film and the semiconductor substrate.   
     
     
         2 . The apparatus of  claim 1 , wherein the strain-inducing film is planar. 
     
     
         3 . The apparatus of  claim 2 , wherein the strain-inducing film comprises an amorphous material. 
     
     
         4 . The apparatus of  claim 3 , wherein the strain-inducing film comprises silicon oxide or silicon nitride. 
     
     
         5 . The apparatus of  claim 1 , wherein:
 the strain-inducing film is configured to impart a tensile strain on the quantum well channel to increase a velocity of mobile charge carriers in the quantum well channel, the mobile charge carriers being electrons; and   the quantum well channel is a channel of an N-type device.   
     
     
         6 . The apparatus of  claim 1 , wherein:
 the strain-inducing film is configured to impart a compressive strain on the quantum well channel to increase a velocity of mobile charge carriers in the quantum well channel, the mobile charge carriers being holes; and   the quantum well channel is a channel of a P-type device.   
     
     
         7 . The apparatus of  claim 1 , wherein:
 the quantum well channel comprises a first material having a first lattice constant;   the source structure and the drain structure comprise a second material having a second lattice constant that is different than the first lattice constant; and   material of the quantum well channel does not extend into the source structure.   
     
     
         8 . The apparatus of  claim 7 , wherein:
 the source structure is epitaxially coupled to the quantum well channel to form a heterojunction;   the drain structure is epitaxially coupled to the quantum well channel to form another heterojunction; and the quantum well channel, the source structure, and the drain structure comprise a group III-V semiconductor, or a group II-VI semiconductor, or combinations thereof.   
     
     
         9 . The apparatus of  claim 1 , wherein the quantum well channel is a channel of a horizontal field-effect transistor; and
 wherein the horizontal field-effect transistor is a high electron mobility transistor (HEMT).   
     
     
         10 . The apparatus of  claim 1 , further comprising:
 a contact layer coupled with the quantum well channel, wherein the quantum well channel is disposed between the contact layer and the semiconductor substrate and the strain-inducing layer is in direct contact with the contact layer.   
     
     
         11 . The apparatus of  claim 10 , further comprising:
 a first barrier layer disposed between the quantum well channel and the semiconductor substrate; and   a second barrier layer disposed between the contact layer and the quantum well channel, wherein the first barrier layer comprises a material having a bandgap energy that is greater than a bandgap energy of the quantum well channel; and the second barrier layer comprises a material having a bandgap energy that is greater than the bandgap energy of the quantum well channel.   
     
     
         12 . The apparatus of  claim 11 , further comprising one or more buffer layers epitaxially coupled to the semiconductor substrate, the first barrier layer being epitaxially coupled to the one or more buffer layers. 
     
     
         13 . The apparatus of  claim 11 , wherein:
 the semiconductor substrate comprises silicon (Si),   the first barrier layer comprises indium aluminum arsenide (InAlAs), or indium phosphide (InP), or combinations thereof,   the quantum well channel comprises indium gallium arsenide (InGaAs),   the source structure and the drain structure comprise gallium arsenide (GaAs),   the second barrier layer comprises indium aluminum arsenide (InAlAs), or indium phosphide (InP), or combinations thereof, and   the contact layer comprises indium gallium arsenide (InGaAs).   
     
     
         14 . A method comprising:
 forming a semiconductor heterostructure comprising:
 a semiconductor substrate, and 
 a quantum well channel coupled with the semiconductor substrate; 
   forming a source structure coupled with the quantum well channel and a drain structure coupled with the quantum well channel; and   depositing a strain-inducing film on and in direct contact with material of the source structure and the drain structure to reduce resistance of the quantum well channel by imparting a tensile or compressive strain on the quantum well channel, wherein the quantum well channel is disposed between the strain-inducing film and the semiconductor substrate.   
     
     
         15 . The method of  claim 14 , wherein depositing the strain-inducing film comprises depositing an amorphous material. 
     
     
         16 . The method of  claim 14 , wherein depositing the strain-inducing film provides a planar strain-inducing film. 
     
     
         17 . The method of  claim 14 , wherein depositing the strain-inducing film comprises blanket-depositing silicon oxide or silicon nitride by plasma-enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD). 
     
     
         18 . The method of  claim 14 , wherein subsequent to depositing the strain-inducing film, the strain-inducing film transfers strain to the quantum channel in a process of relaxing. 
     
     
         19 . The method of  claim 14 , wherein:
 forming the semiconductor heterostructure further comprises depositing a contact layer on the quantum well channel; and   the strain-inducing layer is in direct contact with the contact layer.