US2016381809A1PendingUtilityA1

Face-up substrate integration with solder ball connection in semiconductor package

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Assignee: QUALCOMM INCPriority: Mar 20, 2014Filed: Sep 8, 2016Published: Dec 29, 2016
Est. expiryMar 20, 2034(~7.7 yrs left)· nominal 20-yr term from priority
H10W 90/401H10W 72/00H10W 70/611H10W 44/501H10W 72/012H05K 2201/1003H05K 1/165H05K 2201/10719H05K 2203/041H05K 1/141Y10T29/49146H05K 1/144Y10T29/49126H05K 3/3436H05K 2201/10734H05K 1/111H05K 2201/10477H05K 3/4015H05K 3/303H05K 2203/1316H05K 3/368Y10T29/4902H05K 1/0243H05K 2201/10977H05K 1/18H05K 1/0306Y10T29/4913H05K 3/4007H01L 23/645
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Claims

Abstract

Systems and methods relate to a semiconductor package comprising a first substrate or a 2D passive-on-glass (POG) structure with a passive component and a first set of one or more package pads formed on a face of a glass substrate. The semiconductor package also includes a second or laminate substrate with a second set of one or more package pads formed on a face of the second or laminate substrate. Solder balls are dropped, configured to contact the first set of one or more package pads with the second set of one or more package pads, wherein the first substrate or the 2D POG structure is placed face-up on the face of the second or laminate substrate. A printed circuit board (PCB) can be coupled to a bottom side of the second or laminate substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of forming a semiconductor package, the method comprising:
 forming a 2D passive-on-glass (POG) structure with a passive component integrated on a face of a glass substrate;   forming a first set of one or more package pads on the face of a glass substrate;   forming a laminate substrate with a second set of one or more package pads on a face of the laminate substrate;   placing the 2D POG structure face-up on the laminate substrate; and   contacting the first set of one or more package pads with the second set of one or more package pads with solder balls.   
     
     
         2 . The method of  claim 1  further comprising attaching a printed circuit board (PCB) to a bottom side of the laminate substrate through land grid array (LGA) package pads on a bottom side of the laminate substrate. 
     
     
         3 . The method of  claim 2 , further comprising connecting the LGA package pads on the bottom side of the laminate substrate to the second set of one or more package pads formed on the face of the laminate substrate through vias. 
     
     
         4 . The method of  claim 1 , further comprising forming a mold over the passive component for protect the passive component and enabling laser marking. 
     
     
         5 . The method of  claim 1 , wherein the passive component is an inductor.

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