US5567981AExpiredUtility

Bonding pad structure having an interposed rigid layer

69
Assignee: INTEL CORPPriority: Mar 31, 1993Filed: Mar 31, 1993Granted: Oct 22, 1996
Est. expiryMar 31, 2013(expired)· nominal 20-yr term from priority
H10W 72/9232H10W 72/07533H10W 72/5524H10W 72/5522H10W 72/983H10W 72/952H10W 72/923H10W 72/552H10W 72/536H10W 72/59H10W 70/60H10W 72/019
69
PatentIndex Score
40
Cited by
14
References
30
Claims

Abstract

A bonding pad structure for use with compliant dielectric materials and a method for wire bonding is described in which a rigid layer is formed between the bonding pad and the compliant dielectric layer. The rigid layer increases the stiffness of the bonding structure such that an effective bond may be achieved by conventional ultrasonic and thermosonic bonding methods.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An integrated circuit device having a bonding region, said integrated circuit device comprising: a silicon layer having diffusion regions formed therein;   a plurality of device layers, said device layers formed over said silicon layer and said diffusion regions so as to form an integrated circuit device;   a compliant dielectric layer overlying said device layers;   a bonding pad, said bonding pad formed so as to overlie said compliant dielectric layer, said bonding pad electrically coupled to at least one of said plurality of device layers;   a lead, said lead attached to said bonding pad so as to provide for electrical coupling to said bonding pad; and   a rigid interposed layer, said rigid interposed layer directly overlying said compliant dielectric layer, and being directly below said bonding pad, wherein said rigid interposed layer comprises a material selected from the group consisting of copper and nickel and molybdenum and titanium or any combination thereof.   
     
     
       2. The integrated circuit device of claim 1 wherein said compliant dielectric layer comprises polyimide. 
     
     
       3. The integrated circuit device of claim 2 wherein said rigid interposed layer comprises a material selected from the group consisting of copper and nickel and molybdenum and titanium or any combination thereof. 
     
     
       4. The integrated circuit device of claim 3 wherein said lead is bonded to said bonding pad at a force of between 60 and 130 grams. 
     
     
       5. The integrated device of claim 4 wherein said lead is bonded to said bonding pad at an ultrasonic power of between 100 milliwatts and 140 milliwatts. 
     
     
       6. The integrated circuit device of claim 4 wherein said lead comprises gold and wherein thermosonic bonding methods are used to bond said lead to said bonding pad. 
     
     
       7. The integrated circuit of claim 4 wherein said lead comprises silver and wherein ultrasonic bonding methods are used to bond said lead to said bonding pad. 
     
     
       8. The integrated circuit device of claim 4 wherein said bonding pad has a thickness of approximately 3 mm and said rigid interposed layer has a thickness of approximately 0.5 mm. 
     
     
       9. The integrated circuit device of claim 8 wherein said plurality of device layers comprise a plurality of metallization layers and a plurality of dielectric layers, at least some of said dielectric layers comprising polyimide. 
     
     
       10. In an integrated circuit device formed on a semiconductor wafer, said integrated circuit device having a polyimide dielectric layer, a bonding pad, and a lead, an improvement comprising: forming a rigid interposed layer between said polyimide dielectric layer and said bonding pad, wherein said rigid interposed layer has a higher modulus of elasticity than said bonding pad, and wherein said rigid interposed layer comprises a material selected from the group consisting of copper and nickel and molybdenum and titanium or any combination thereof.   
     
     
       11. The integrated circuit device of claim 10 wherein said bonding pad comprises a material selected from the group consisting of aluminum and gold and silver or any combination thereof. 
     
     
       12. The integrated circuit device of claim 11 said aluminum bonding pad has a thickness of approximately 3 mm and said rigid interposed layer has a thickness of approximately 0.5 mm. 
     
     
       13. An integrated circuit device formed on a semiconductor wafer, said integrated circuit device having a plurality of electrical device regions, device structures, and a lead for attaching said device regions and said device structures to other electrical components and devices, said device regions and device structures comprising: a plurality of polyimide dielectric layers, at least one of said polyimide dielectric layers overlying said plurality of electrical device regions and device structures;   a bonding pad, said bonding pad overlying said plurality of device regions and device structures and overlying at least some of said polyimide dielectric layers, said bonding pad electrically coupled to at least one of said plurality of device regions and device structures; and   a rigid interposed pad, said rigid interposed pad underlying said bonding pad so as to form a rigid bonding structure, wherein said rigid interposed layer comprises a material selected from the group consisting of copper and nickel and molybdenum and titanium or any combination thereof.   
     
     
       14. The integrated circuit device of claim 13 wherein said bonding pad comprises a material selected from the group consisting of aluminum and gold and silver or any combination thereof. 
     
     
       15. The integrated circuit device of claim 14 wherein said bonding pad has a thickness of approximately 3 mm and said titanium pad has a thickness of approximately 0.5 mm. 
     
     
       16. Integrated circuit device of claim 1 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       17. The integrated circuit device of claim 2 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       18. The integrated circuit device of claim 3 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       19. The integrated circuit device of claim 4 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one or said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       20. The integrated circuit device of claim 5 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       21. The integrated circuit device of claim 6 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       22. The integrated circuit device of claim 7 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       23. The integrated circuit device of claim 8 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one or said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       24. The integrated circuit device of claim 9 wherein said rigid interposed layer is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed layer. 
     
     
       25. The integrated circuit device of claim 10 wherein said rigid interposed layer is conductive, and wherein said bonding pad is coupled to at least one of a plurality of device regions and device structures through said rigid interposed layer. 
     
     
       26. The integrated circuit device of claim 11 wherein said rigid interposed layer is conductive, and wherein said bonding pad is coupled to at least one of a plurality of device regions and device structures through said rigid interposed layer. 
     
     
       27. The integrated circuit device of claim 12 wherein said rigid interposed layer is conductive, and wherein said bonding pad is coupled to at least one of a plurality of device regions and device structures through said rigid interposed layer. 
     
     
       28. The integrated circuit device of claim 13 wherein said rigid interposed pad is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed pad. 
     
     
       29. The integrated circuit device of claim 14 wherein said rigid interposed pad is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed pad. 
     
     
       30. The integrated circuit device of claim 15 wherein said rigid interposed pad is conductive, and wherein said bonding pad is electrically coupled to said at least one of said plurality of device regions and device structures through said rigid interposed pad.

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