Semiconductor device

Abstract

A semiconductor device that prevents metal pollution and a method of manufacturing the semiconductor device. A region (NR) and a region (PR) are defined by a trench isolation oxide film, a polysilicon film selectively provided on the trench isolation oxide film, a silicon layer provided on the polysilicon film, and a side wall spacer provided on a side surface of the polysilicon film. The polysilicon film is provided in a position corresponding to a top of a PN junction portion JP of a P-type well region and an N-type well region in a SOI layer across the two well regions.

What is claimed is:  
     
       1. A semiconductor device comprising: 
       a semiconductor layer;  
       a plurality of semiconductor elements formed on said semiconductor layer;  
       an isolation film formed in a surface of said semiconductor layer, said semiconductor elements being electrically isolated from each other by said isolation film;  
       a PN junction portion formed by two semiconductor regions of different conductivity types in said semiconductor layer provided under said isolation film; and  
       a polysilicon film provided in a position opposed to a top of said PN junction portion with said isolation film interposed therebetween across said two semiconductor regions, said polysilicon film covering a part of an upper portion of said isolation film, and a remaining part of said upper portion of said isolation film has a width smaller than twice of a thickness of said isolation film.  
     
     
       2. The semiconductor device according to  claim 1 , wherein said polysilicon film is formed in said upper portion of an outside of said isolation film, and 
       a formation width of said polysilicon film is set such that a length Lg from a position in said polysilicon film corresponding to a position of said PN junction portion to an end of said polysilicon film and  
       said thickness Tst of said isolation film satisfy an equation of 0.5 Lg<Tst<20 Lg.  
     
     
       3. The semiconductor device according to  claim 2 , wherein said semiconductor elements include a MOS transistor, and 
       a thickness of said polysilicon film is equal to that of a gate polysilicon film constituting a gate electrode of said MOS transistor.  
     
     
       4. The semiconductor device according to  claim 2 , wherein said semiconductor elements include a MOS transistor, and 
       a thickness of said polysilicon film is smaller than that of a gate polysilicon film constituting a gate electrode of said MOS transistor.  
     
     
       5. The semiconductor device according to  claim 1 , wherein said PN junction portion is extended along a provision pattern of said isolation film, and 
       said polysilicon film is provided along said PN junction portion.  
     
     
       6. A semiconductor device comprising: 
       a semiconductor layer;  
       a plurality of semiconductor elements formed on said semiconductor layer;  
       an isolation film formed in a surface of said semiconductor layer, said semiconductor elements being electrically isolated from each other by said isolation film;  
       a PN junction portion formed by two semiconductor regions of different conductivity types in said semiconductor layer provided under said isolation film; and  
       a polysilicon film provided in a position opposed to a top of said PN junction portion with said isolation film interposed therebetween across said two semiconductor regions,  
       wherein said polysilicon film is formed in said isolation film, and has a substantially uniform thickness across said two semiconductor regions.  
     
     
       7. The semiconductor device according to  claim 6 , wherein said isolation film has an upper oxide film and a lower oxide film which are provided in upper and lower portions of said polysilicon film, and 
       an oxide film spacer for covering side surfaces of said upper oxide film, said polysilicon film and said lower oxide film.  
     
     
       8. The semiconductor device according to  claim 6 , wherein said isolation film has an upper oxide film and a lower oxide film which are provided in upper and lower portions of said polysilicon film, and 
       an oxide film provided on a side surface of said polysilicon film.  
     
     
       9. The semiconductor device according to  claim 6 , wherein said polysilicon film is connected to have a predetermined electric potential. 
     
     
       10. The semiconductor device according to  claim 6 , wherein said semiconductor device is an SOI semiconductor device formed on an SOI substrate including a silicon substrate, a buried oxide film provided on said silicon substrate and an SOI layer provided on said buried oxide film, 
       said semiconductor layer being said SOI layer.