US8461680B2ActiveUtilityA1

Integrated circuit packaging system with rounded interconnect

49
Assignee: BAE JOHYUNPriority: Jun 2, 2010Filed: Oct 12, 2011Granted: Jun 11, 2013
Est. expiryJun 2, 2030(~3.9 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/724H10W 90/722H10W 74/15H10W 74/10H10W 74/00H10W 72/07251H10W 72/20H10W 70/60H10W 90/00H10W 74/117H10W 74/016H10W 74/01H10W 46/00H10W 20/20H10W 72/00
49
PatentIndex Score
0
Cited by
10
References
16
Claims

Abstract

An integrated circuit packaging system includes: a package carrier; an integrated circuit attached to the package carrier; a rounded interconnect on the package carrier; and an encapsulation over the package carrier covering the integrated circuit and exposing the rounded interconnect having a characteristic free of denting.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An integrated circuit packaging system comprising:
 a package carrier; 
 an integrated circuit attached to the package carrier; 
 a rounded interconnect on the package carrier; and 
 an encapsulation over the package carrier covering the integrated circuit and exposing the rounded interconnect, wherein the encapsulation has an opening sidewall around a portion of the rounded interconnect. 
 
     
     
       2. The system as claimed in  claim 1  wherein the encapsulation has a laser-ablated mark. 
     
     
       3. The system as claimed in  claim 1  wherein the rounded interconnect is a conductive bump on the package carrier. 
     
     
       4. The system as claimed in  claim 1  wherein the package carrier is a substrate. 
     
     
       5. An integrated circuit packaging system comprising:
 a package carrier; 
 an integrated circuit attached to the package carrier; 
 a rounded interconnect on the package carrier; and 
 an encapsulation over the package carrier covering the integrated circuit and exposing the rounded interconnect, wherein the encapsulation has a top surface, an opening sidewall, and an opening bounded thereby, the opening sidewall at an obtuse angle relative to the top surface and the opening exposing the rounded interconnect. 
 
     
     
       6. The system as claimed in  claim 5  wherein the encapsulation has a laser-ablated mark. 
     
     
       7. The system as claimed in  claim 5  wherein the rounded interconnect is a conductive bump on the package carrier. 
     
     
       8. The system as claimed in  claim 5  wherein the package carrier is a substrate. 
     
     
       9. An integrated circuit packaging system comprising:
 a package carrier; 
 an integrated circuit attached to the package carrier; 
 a rounded interconnect on the package carrier; and 
 an encapsulation over the package carrier covering the integrated circuit and exposing the rounded interconnect, wherein the encapsulation has an opening sidewall; and further comprising: 
 a stacking joint having a lower portion in contact with the opening sidewall. 
 
     
     
       10. The system as claimed in  claim 9  wherein the encapsulation has a laser-ablated mark. 
     
     
       11. The system as claimed in  claim 9  wherein the rounded interconnect is a conductive bump on the package carrier. 
     
     
       12. The system as claimed in  claim 9  wherein the package carrier is a substrate. 
     
     
       13. An integrated circuit packaging system comprising:
 a package carrier; 
 an integrated circuit attached to the package carrier; 
 a rounded interconnect on the package carrier; and 
 an encapsulation over the package carrier covering the integrated circuit and exposing the rounded interconnect, wherein the encapsulation has a top surface above the rounded interconnect, and wherein the encapsulation has an opening sidewall around a portion of the rounded interconnect, the opening sidewall approximately aligned with the rounded interconnect. 
 
     
     
       14. The system as claimed in  claim 13  wherein the encapsulation has a laser-ablated mark. 
     
     
       15. The system as claimed in  claim 13  wherein the rounded interconnect is a conductive bump on the package carrier. 
     
     
       16. The system as claimed in  claim 13  wherein the package carrier is a substrate.

Cited by (0)

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References (0)

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