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US9761534B2ActiveUtilityPatentIndex 84

Semiconductor package, semiconductor device using the same and manufacturing method thereof

Assignee: MEDIATEK INCPriority: Sep 21, 2015Filed: May 24, 2016Granted: Sep 12, 2017
Est. expirySep 21, 2035(~9.2 yrs left)· nominal 20-yr term from priority
Inventors:HSU WEN-SUNGLIN SHIH-CHINCHENG TAOCHANG ANDREW C
H10W 90/754H10W 90/724H10W 90/722H10W 90/701H10W 74/117H10W 72/07207H10W 72/252H10W 70/60H10W 90/00H10W 74/129H10W 74/019H10W 74/016H10W 72/00H10W 70/695H10W 70/635H10W 70/095H10W 70/093H10W 70/05H10W 70/685H10W 74/014H10W 70/614H10W 74/114H01L 21/4846H01L 2924/014H01L 2225/1058H01L 2924/19042H01L 21/568H01L 24/13H01L 2924/15311H01L 2225/1041H01L 2924/1579H01L 23/3114H01L 23/49827H01L 2224/16238H01L 23/50H01L 23/49816H01L 24/81H01L 25/105H01L 2924/19106H01L 23/145H01L 2924/19043H01L 2924/00014H01L 25/50H01L 2924/19041H01L 2224/81005H01L 24/48H01L 25/16H01L 2924/1533H01L 23/3128H01L 2224/48227H01L 2224/131H01L 23/5389H01L 25/10H01L 2224/16227H01L 2225/1023H01L 21/486H01L 25/0657H01L 25/162H01L 25/165H01L 21/4853H01L 24/16H01L 21/565
84
PatentIndex Score
11
Cited by
11
References
19
Claims

Abstract

A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor package, comprising:
 a package substrate, comprises: 
 a first conductive layer; 
 a first pillar layer formed on the first conductive layer; 
 a first package body encapsulating the first conductive layer and the first pillar layer; and 
 a second conductive layer electrically connecting to the first pillar layer; 
 a first electronic component disposed above the second conductive layer of the package substrate; 
 a second package body encapsulating the first electronic component and the second conductive layer; 
 a third conductive layer formed on the first package body; 
 a third pillar layer connecting the third conductive layer to the second conductive layer; and 
 a third package body encapsulating the third pillar layer and the third conductive layer; 
 wherein the second conductive layer is formed on the third package body. 
 
     
     
       2. The semiconductor package as claimed in  claim 1 , wherein the first package body is molding compound. 
     
     
       3. The semiconductor package as claimed in  claim 1 , further comprises:
 a second pillar layer formed on the second conductive layer; 
 wherein the second package body further encapsulates the second pillar layer. 
 
     
     
       4. The semiconductor package as claimed in  claim 1 , wherein the third package body is molding compound. 
     
     
       5. The semiconductor package as claimed in  claim 1 , wherein the first conductive layer has a first lower surface, the first package body has a second lower surface, the first lower surface is exposed form the second lower surface, and the semiconductor package further comprises:
 a second electronic component disposed on the first lower surface of the first conductive layer. 
 
     
     
       6. The semiconductor package as claimed in  claim 1 , further comprises:
 an interposer disposed on the second package body and electrically connecting to the package substrate. 
 
     
     
       7. The semiconductor package as claimed in  claim 1 , further comprises:
 a fourth conductive layer; and 
 a second pillar layer connecting the fourth conductive layer to the second conductive layer; 
 wherein the second package body encapsulates the second pillar layer and the fourth conductive layer. 
 
     
     
       8. The semiconductor package as claimed in  claim 1 , wherein the first pillar layer has a first upper surface, the first package body has a second upper surface, and the first upper surface is aligned with the second upper surface. 
     
     
       9. The semiconductor package as claimed in  claim 1 , wherein the first conductive layer has a first lower surface, the first package body has a second lower surface, and the first lower surface is aligned with the second lower surface. 
     
     
       10. A semiconductor device, comprising:
 a semiconductor package, comprising:
 a package substrate, comprises:
 a first conductive layer; 
 a first pillar layer formed on the first conductive layer; 
 a first package body encapsulating the first conductive layer and the first pillar layer; and 
 a second conductive layer electrically connecting to the first pillar layer; 
 a first electronic component disposed above the second conductive layer of the package substrate; 
 a second package body encapsulating the first electronic component and the second conductive layer; 
 a second pillar layer formed on the second conductive layer of the semiconductor package; and 
 a third electronic component disposed above the second package body and electrically connecting to the package substrate through the second pillar layer; 
 wherein the second package body further encapsulates the second pillar layer; 
 a third conductive layer formed on the first package body; 
 a third pillar layer connecting the third conductive layer to the second conductive layer; and 
 a third package body encapsulating the third pillar layer and the third package body; 
 wherein the second conductive layer is formed on the third package body. 
 
 
 
     
     
       11. The semiconductor device as claimed in  claim 10 , wherein the third package body is molding compound. 
     
     
       12. The semiconductor device as claimed in  claim 10 , wherein the first conductive layer has a first lower surface, the first package body has a second lower surface, the first lower surface is exposed form the second lower surface, and the semiconductor package further comprises:
 a second electronic component disposed on the first lower surface of the first conductive layer. 
 
     
     
       13. The semiconductor device as claimed in  claim 10 , further comprises:
 an interposer disposed on the second package body and electrically connecting to the package substrate through the second pillar layer. 
 
     
     
       14. The semiconductor device as claimed in  claim 10 , further comprises:
 a fourth conductive layer; 
 wherein the second pillar layer connects the fourth conductive layer to the second conductive layer, and the second package body encapsulates the second pillar layer and the fourth conductive layer. 
 
     
     
       15. The semiconductor device as claimed in  claim 10 , wherein the first package body is molding compound. 
     
     
       16. The semiconductor device as claimed in  claim 10 , wherein the first pillar layer has a first upper surface, the first package body has a second upper surface, and the first upper surface is aligned with the second upper surface. 
     
     
       17. The semiconductor device as claimed in  claim 10 , wherein the first conductive layer has a first lower surface, the first package body has a second lower surface, and the first lower surface is aligned with the second lower surface. 
     
     
       18. A semiconductor device, comprising:
 a semiconductor package, comprising: 
 a package substrate, comprises: a first conductive layer: 
 a first pillar layer formed on the first conductive layer: a first package body encapsulating the first conductive layer and the first pillar layer: and 
 a second conductive layer electrically connecting to the first pillar layer: a first electronic component disposed above the second conductive layer of the package substrate: 
 a second package body encapsulating the first electronic component and the second conductive layer; 
 a second pillar layer formed on the second conductive layer of the semiconductor package; and
 a third electronic component disposed above the second package body and electrically connecting to the package substrate through the second pillar layer; wherein the second package body further encapsulates the second pillar layer; 
 
 an interposer disposed on the second package body and electrically connecting to the package substrate through the second pillar layer; 
 wherein the third electronic component is disposed on and electrically connecting to the interposer. 
 
     
     
       19. The semiconductor device as claimed in  claim 10 , further comprises:
 a fourth conductive layer; 
 wherein the second pillar layer connects the fourth conductive layer to the second conductive layer, the second package, body encapsulates the second pillar layer and the fourth conductive layer, and the third electronic component is disposed on and electrically connecting to the fourth conductive layer.

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