Methods for forming semiconductor device structures

Abstract

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed substrate including a bulk material, a strained layer directly on the relaxed substrate, where a strain of the strained layer is not induced by the relaxed substrate, and a transistor formed on the strained layer.

What is claimed is: 
     
       1. A structure comprising:
 a relaxed substrate comprising a bulk material; 
 a strained layer directly on the relaxed substrate, wherein a strain of the strained layer is not induced by the relaxed substrate, and wherein a portion of the strained layer is relaxed; and 
 a transistor formed on the strained layer. 
 
     
     
       2. The structure of  claim 1 , wherein the relaxed substrate comprises a bulk dielectric material. 
     
     
       3. The structure of  claim 2 , wherein the bulk dielectric material comprises Al 2 O 3  or SiO 2 . 
     
     
       4. The structure of  claim 1 , wherein the bulk material comprises a bulk semiconductor material. 
     
     
       5. The structure of  claim 1 , wherein the relaxed substrate and the strained layer comprise a same semiconductor material. 
     
     
       6. The structure of  claim 5 , wherein the same semiconductor material is silicon. 
     
     
       7. The structure of  claim 1 , wherein the strained layer and the relaxed substrate are lattice-mismatched, the strain of the strained layer being independent of the lattice mismatch between the strained layer and the relaxed substrate. 
     
     
       8. The structure of  claim 1 , wherein the strained layer and the relaxed substrate have a same lattice constant. 
     
     
       9. The structure of  claim 1 , wherein the strained layer has a first surface opposite the relaxed substrate, the first surface having a surface roughness of less than 20 Å. 
     
     
       10. The structure of  claim 1 , wherein the strained layer comprises an epitaxial material. 
     
     
       11. A semiconductor structure comprising:
 a substrate comprising a bulk material; 
 a strained layer on a top surface of the substrate, the strained layer and the substrate being lattice-mismatched, a strain of the strained layer being independent of the lattice mismatch between the strained layer and the substrate, wherein the strained layer has a thickness uniformity of better than approximately ±5%; and 
 a transistor on the strained layer. 
 
     
     
       12. The semiconductor structure of  claim 11 , wherein the substrate comprises a bulk dielectric material. 
     
     
       13. The semiconductor structure of  claim 12 , wherein the bulk dielectric material comprises alumina, sapphire, or quartz. 
     
     
       14. The semiconductor structure of  claim 11 , wherein the bulk material comprises a bulk semiconductor material. 
     
     
       15. The semiconductor structure of  claim 11 , wherein the substrate is a relaxed substrate. 
     
     
       16. The semiconductor structure of  claim 11 , wherein the strained layer has a top surface with a surface roughness of less than 20 Å. 
     
     
       17. A structure comprising:
 a substrate comprising a bulk material; 
 a strained layer on a top surface of the substrate, wherein a strain of the strained layer is not induced by the substrate, and wherein the strained layer comprises a relaxed portion; and 
 a transistor on the strained layer. 
 
     
     
       18. The structure of  claim 17 , wherein the substrate comprises a bulk dielectric material. 
     
     
       19. The structure of  claim 17 , wherein the bulk material comprises a bulk semiconductor material. 
     
     
       20. The structure of  claim 17 , wherein the substrate and the strained layer comprise a same semiconductor material.