Cobalt silicidation process for substrates comprised with a silicon-germanium layer

Abstract

A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a portion of the semiconductor alloy layer overlying the source and drain regions, and forming a metal silicide region over the source and drain regions.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a substrate formed of a semiconductor material; 
 a gate structure formed over the substrate; 
 source and drain regions formed of the semiconductor material on both sides of the gate structure in the substrate; 
 a first semiconductor alloy layer portion in the substrate below the gate structure, the first semiconductor alloy layer portion being formed of a material that is different than the semiconductor material, wherein the first semiconductor alloy layer portion extends above the source and drain regions; and 
 a second semiconductor alloy layer portion in the substrate overlying the first semiconductor alloy layer portion and the source and drain regions, the second semiconductor alloy layer portion being formed of a material that is different than the semiconductor material, wherein the material of the second semiconductor alloy layer portion is a silicide of the material of the first semiconductor alloy layer portion, and wherein the second semiconductor alloy layer portion includes one of nitrogen and silicon ions implanted. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the first semiconductor alloy layer portion includes SiGe. 
     
     
       3. The semiconductor device of  claim 1 , wherein the second semiconductor alloy layer portion includes Co(Si x GE 1-x ) where x is greater than 0. 
     
     
       4. The semiconductor device of  claim 1 , wherein the first semiconductor alloy layer portion has a first thickness under the gate structure and a second thickness under the second semiconductor alloy layer portion, the first thickness being greater than the second thickness. 
     
     
       5. The semiconductor device of  claim 4 , wherein the first semiconductor alloy layer having the first thickness extends under a gate spacer abutting the gate structure. 
     
     
       6. A semiconductor device comprising:
 a substrate formed of a semiconductor material having a first portion and a second portion; 
 a gate structure formed over the first portion of the substrate, wherein the gate structure has a gate dielectric layer that interfaces a top surface of the substrate; 
 source and drain regions disposed on opposite sides of the gate structure and formed of the semiconductor material in the second portion of the substrate; 
 a first semiconductor alloy layer in the first portion of the substrate, the first semiconductor alloy layer being formed of a material that is different than the semiconductor material; and 
 a second semiconductor alloy layer in the second portion of the substrate overlying the source and drain regions, the second semiconductor alloy layer being formed of a material different than the semiconductor material, wherein the material of the second semiconductor alloy layer includes an ion implanted species that prevents segregation of the material of the first semiconductor alloy layer to a surface of the second semiconductor alloy layer, and wherein the second semiconductor alloy layer has a top surface coplanar with the top surface of the substrate interfacing the gate dielectric layer and extends to the semiconductor material of the substrate. 
 
     
     
       7. The semiconductor device of  claim 6 , wherein a top surface of the first semiconductor alloy layer is non-coplanar with respect to the top surface of the second semiconductor alloy layer. 
     
     
       8. The semiconductor device of  claim 6 , wherein a bottom surface of the first semiconductor alloy layer is substantially coplanar with a bottom surface of the second semiconductor alloy layer. 
     
     
       9. The semiconductor device of  claim 6 , wherein the material of the second semiconductor alloy layer is a metal silicide and the semiconductor material is silicon. 
     
     
       10. The semiconductor device of  claim 9 , wherein the metal silicide of the second semiconductor alloy layer is CoSi. 
     
     
       11. The semiconductor device of  claim 6 , wherein the first semiconductor alloy layer includes SiGe and the semiconductor material is silicon. 
     
     
       12. The semiconductor device of  claim 6 , wherein the first semiconductor alloy layer is thinner than the second semiconductor alloy layer.