Test emulator, test module emulator and record medium storing program therein

Abstract

There is provided a test emulator for emulating a test apparatus including a plurality of test modules for supplying test signal to devices under test respectively, including: a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on different cycles, a control emulation section for emulating a control apparatus for controlling the test of the devices under test, a synchronous emulation section for generating test signal generating timings, at which each of the plurality of test module emulation sections is to generate the test signal in simulation corresponding to cycle time of the test module emulation section, based on instructions from the control emulation section, a timing alignment section for aligning the plurality of test signal generating timings generated by the synchronous emulation section in order of time, and outputting them one by one, and a schedule section for causing the test module emulation section corresponding to one of the test signal generating timings output by the timing alignment section to generate the test signal in simulation in the cycle time corresponding to the test signal generating timing.

1 .- 14 . (canceled)  
   
   
       15 . A test emulator for emulating a test apparatus comprising a plurality of test modules for supplying a test signal to devices under test, comprising: 
 a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on a cycle;    a control emulation section for emulating a control apparatus for controlling the test of the devices under test; and    a schedule section for scheduling test signal generating timing at which each of said plurality of test module emulation sections is to generate test signal corresponding to a cycle time in simulation, wherein    said test module emulation section outputs variation of voltage of the test signal during the cycle time corresponding to the test signal generating timing by calling voltage setting method of an output channel object which emulates an output channel for multiple times on receiving the test signal generating timing by a function call, and    said test module emulation section notifies that output of the variation of the voltage of the test signal corresponding to the cycle time is finished by calling an end method of the output channel object output after the output of the variation of the voltage of the test signal corresponding to the cycle time is finished.    
   
   
       16 . The test emulator as claimed in  claim 15 , wherein 
 said schedule section calculates a period during which all of said test module emulation sections finishes the output of the variation of the voltage of the test signal based on the end method notified from each of said plurality of test module emulation sections, and    the test emulator further comprises a device under test simulating section for acquiring the test signal within the period and simulates operation of the device under test during the period based on the test signal.    
   
   
       17 . The test emulator as claimed in  claim 15 , wherein the output channel object forbids the variation of the voltage in the period during which the output of the variation of the voltage of the test signal was finished, which was notified by the end method, after the end method was called.