Gate-last fabrication of quarter-gap MGHK FET

Abstract

A quarter-gap p-type field effect transistor (PFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a gate metal layer located over the high-k dielectric layer, the gate metal layer including titanium nitride and having a thickness of about 20 angstroms; and a metal contact formed over the gate stack. A quarter-gap n-type field effect transistor (NFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a first gate metal layer located over the high-k dielectric layer, the first gate metal layer including titanium nitride; and a metal contact formed over the gate stack.

What is claimed is: 
     
       1. A quarter-gap n-type field effect transistor (NFET) formed by gate-last fabrication, the quarter-gap NFET comprising:
 a gate stack formed on a silicon substrate, the gate stack comprising:
 a high-k dielectric layer located on the silicon substrate; and 
 a gate metal layer located over the high-k dielectric layer, the gate metal layer comprising titanium nitride and having the gate metal layer a thickness from about 30 angstroms to about 100 angstroms; 
 a threshold voltage tuning layer located between the high-k dielectric layer and the gate metal layer, wherein the threshold voltage tuning layer comprises a layer of lanthanum having a thickness from about 4 angstroms to 100 angstroms wherein the thickness of the threshold voltage tuning layer is based on a thickness of the gate metal layer; and 
 
 a metal contact formed over the gate stack, 
 wherein an effective work-function of the quarter-gap NFET is about 4.325 electron-volts. 
 
     
     
       2. The quarter-gap NFET of  claim 1 , wherein the high-k dielectric layer comprises hafnium oxide, and the metal contact includes one of aluminum and tungsten. 
     
     
       3. A mid-gap n-type field effect transistor (NFET) formed by gate-last fabrication, the mid-gap NFET comprising:
 a gate stack formed on a silicon substrate, the gate stack comprising:
 a high-k dielectric layer located on the silicon substrate; and 
 a first gate metal layer located over the high-k dielectric layer, the first gate metal layer comprising titanium nitride and having a thickness from about 20 angstroms to 35 angstroms; 
 a threshold voltage tuning layer located between the high-k dielectric layer and the first gate metal layer, wherein the threshold voltage tuning layer comprises aluminum and wherein a thickness of the threshold voltage tuning layer is based on the thickness of the first gate metal layer; and 
 
 a metal contact formed over the gate stack, 
 wherein an effective work-function of the mid-gap NFET is about 4.60 electron-volts. 
 
     
     
       4. The mid-gap NFET of  claim 3 , wherein the high-k dielectric layer comprises hafnium oxide, and the metal contact comprises one of aluminum and tungsten. 
     
     
       5. The mid-gap NFET of  claim 3 , wherein the gate stack further comprises an oxygen barrier layer located over the first gate metal layer, the oxygen barrier layer including tantalum nitride (TaN) formed by atomic layer deposition (ALD), and a second gate metal layer located over the oxygen barrier layer, wherein the first gate metal layer has a thickness of about 20 angstroms, and the second gate metal layer has a thickness from about 35 angstroms to about 100 angstroms.