Semiconductor package for thermal dissipation

Abstract

A first package is bonded to a first substrate with first external connections and second external connections. The second external connections are formed using materials that are different than the first external connections in order to provide a thermal pathway from the first package. In a particular embodiment the first external connections are solder balls and the second external connections are copper blocks.

What is claimed is: 
     
       1. A method of manufacturing a semiconductor device, the method comprising:
 forming a first set of external connections on a front side of an interconnect structure of a first package, wherein the first set of external connections are on first contact pads in a signal region of the first package; and 
 placing a second set of external connections on the front side of the interconnect structure, wherein the second set of external connections are on second contact pads in a power/ground region of the first package, and wherein the second set of external connections are formed of a different material that has a higher thermal conductivity than a material of the first set of external connections. 
 
     
     
       2. The method of  claim 1 , wherein the second set of external connections comprise conductive blocks. 
     
     
       3. The method of  claim 2 , wherein the second set of external connections comprise copper. 
     
     
       4. The method of  claim 1  further comprising bonding the first package to a substrate using the first set of external connections and the second set of external connections to electrically and thermally connect the first package and the substrate, wherein the second set of external connections are attached to the second contact pads by first solder regions, wherein bonding the first package to the substrate comprises attaching the second set of external connections to third contact pads of the substrate through second solder regions, and wherein each of the first solder regions and each of the second solder regions are disposed on opposing surfaces of a corresponding one of the second set of external connections. 
     
     
       5. The method of  claim 4 , wherein the substrate is a printed circuit board. 
     
     
       6. The method of  claim 4 , wherein placing the second set of external connections further comprises applying solder flux between the second contact pads of the interconnect structure and the second set of external connections. 
     
     
       7. The method of  claim 1 , wherein placing the second set of external connections further comprises placing copper foil on the front side of the interconnect structure. 
     
     
       8. The method of  claim 1 , wherein placing the second set of external connections further comprises placing a conductive paste on the front side of the interconnect structure. 
     
     
       9. The method of  claim 1  further comprising bonding the first package to a second package using a third set of external connections, wherein a material of the first set of external connections and the third set of external connections are the same. 
     
     
       10. A method of manufacturing a semiconductor device, the method comprising:
 bonding a first package to a second package using a first set of external connections; and 
 bonding an interconnect structure of the second package to a substrate using a second set of external connections on a signal region of the second package and a third set of external connections on a power/ground region of the second package, wherein a material of the second set of external connections is different from a material of the third set of external connections, and wherein the third set of external connections comprise openings within the third set of external connections. 
 
     
     
       11. The method of  claim 10 , wherein bonding the interconnect structure of the second package to the substrate using the second set of external connections comprises reflowing the second set of external connections. 
     
     
       12. The method of  claim 10 , wherein the material of the third set of external connections has a higher thermal conductivity than the material of the second set of external connections. 
     
     
       13. The method of  claim 10 , wherein the third set of external connections comprise a copper block. 
     
     
       14. The method of  claim 10 , wherein the third set of external connections comprise a shape that is a circle, polygon, star, cross, or a U-shape in a top down view. 
     
     
       15. The method of  claim 10 , wherein the third set of external connections comprise a plurality of conductive blocks having different widths. 
     
     
       16. A method of manufacturing a semiconductor device, the method comprising:
 forming vias on a carrier substrate; 
 positioning a semiconductor die on the carrier substrate adjacent to the vias; 
 replacing the carrier substrate with an interconnect structure to form a package; and 
 forming a first set of external connections and a second set of external connections on a front side of the interconnect structure, wherein the first set of external connections are on a signal region of the package and the second set of external connections are on a power/ground region of the package, wherein a thermal conductivity of the second set of external connections is higher than that of the first set of external connections. 
 
     
     
       17. The method of  claim 16 , wherein the second set of external connections are surrounded by the first set of external connections. 
     
     
       18. The method of  claim 16 , wherein the second set of external connections comprise a conductive ball. 
     
     
       19. The method of  claim 16 , wherein at least portion of the second set of external connections are located does not overlap the semiconductor die. 
     
     
       20. The method of  claim 16 , wherein the second set of external connections comprise openings within the second set of external connections.