US2008211033A1PendingUtilityA1
Reducing oxidation under a high K gate dielectric
Est. expirySep 10, 2024(expired)· nominal 20-yr term from priority
Inventors:Robert TurkotJustin K. BraskJack T. KavalierosMark L. DoczyMatthew V. MetzUday ShahSuman DattaRobert S. Chau
H10D 64/01342H10D 64/01318H10D 64/01316H10D 84/0177H10D 84/038H10D 84/014H10D 64/691H10D 64/667H10D 64/666H10D 64/665
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Abstract
A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier.
Claims
exact text as granted — not AI-modified1 . A semiconductor structure comprising:
a substrate; a stack formed on said substrate, said stack including a polysilicon layer over a dielectric layer; and a polymer diffusion barrier covering the sides of said dielectric layer.
2 . The structure of claim 1 wherein said structure in the complementary metal oxide semiconductor structure including an NMOS transistor and a PMOS transistor, each of said transistors including a dielectric layer whose sides are covered by a polymer diffusion layer.
3 . The structure of claim 1 wherein said dielectric layer has a dielectric constant greater than 10.
4 . The structure of claim 1 wherein said polymer diffusion barrier is formed of fluorocarbon etch residue.Cited by (0)
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