3D Integrated Circuit and Methods of Forming the Same

Abstract

An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a substrate;   an insulating layer on the substrate;   a barrier layer on the insulating layer;   a bonding dielectric layer on the barrier layer; and   a bonding pad extending through the bonding dielectric layer, the barrier layer and the insulating layer and having a top surface exposed from the bonding dielectric layer for bonding to another bonding pad of another semiconductor structure, wherein the bonding pad comprises a conductive material and a liner lining the conductive material, and the liner on a bottom surface of the conductive material directly contacts the substrate.   
     
     
         2 . The semiconductor structure according to  claim 1 , wherein the substrate further comprises a conductive structure, wherein the liner on the bottom surface of the bonding pad directly contacts a top surface of the conductive structure. 
     
     
         3 . The semiconductor structure according to  claim 1 , wherein a thickness of the bonding dielectric layer on the barrier layer is smaller than the insulating layer under the barrier layer. 
     
     
         4 . The semiconductor structure according to  claim 1 , wherein the liner on a sidewall of the bonding pad directly contacts the insulating layer, the bonding dielectric layer and the barrier layer. 
     
     
         5 . The semiconductor structure according to  claim 1 , wherein the bonding dielectric layer comprises silicon oxide (SiO 2 ). 
     
     
         6 . The semiconductor structure according to  claim 1 , wherein the barrier layer comprises a carbon-containing dielectric. 
     
     
         7 . The semiconductor structure according to  claim 1 , wherein the liner comprises titanium. 
     
     
         8 . The semiconductor structure according to  claim 1 , wherein the bonding dielectric layer comprises silicon oxynitride. 
     
     
         9 . The semiconductor structure according to  claim 1 , further comprising an etching stop layer intervening between the substrate and the insulating layer, wherein the bottom surface of the bonding pad is flush with a bottom surface of the etching stop layer. 
     
     
         10 . The semiconductor structure according to  claim 9 , wherein the etching stop layer comprises silicon carbide (SiC). 
     
     
         11 . A bonded semiconductor structure, comprising:
 a first substrate and a second substrate disposed on the first substrate;   a first insulating layer and a first bonding dielectric layer between the first substrate and the second substrate;   a first barrier layer between the first insulating layer and the first bonding dielectric layer;   a first bonding pad extending through the first bonding dielectric layer, the first barrier layer and the first insulating layer, wherein the first bonding pad comprises a first conductive material and a first liner lining the first conductive material, and the first liner on a bottom surface of the first conductive material directly contacts the first substrate;   a second bonding dielectric layer between the first bonding dielectric layer and the second substrate and being bonded to the first bonding dielectric layer; and   a second bonding pad in the second bonding dielectric layer and being bonded to the first bonding pad.   
     
     
         12 . The bonded semiconductor structure according to  claim 11 , wherein the first substrate further comprises a first conductive structure, wherein the first liner on the bottom surface of the first bonding pad directly contacts a top surface of the first conductive structure. 
     
     
         13 . The bonded semiconductor structure according to  claim 11 , wherein the first bonding dielectric layer and the second bonding dielectric layer comprises silicon oxide (SiO 2 ). 
     
     
         14 . The bonded semiconductor structure according to  claim 11 , wherein the first insulating layer comprises un-doped Silicate Glass (USG). 
     
     
         15 . The bonded semiconductor structure according to  claim 11 , wherein the first insulating layer comprises silicon oxide. 
     
     
         16 . The bonded semiconductor structure according to  claim 11 , further comprising an etching stop layer intervening between the first substrate and the first insulating layer, wherein the bottom surface of the first bonding pad is flush with a bottom surface of the etching stop layer. 
     
     
         17 . The bonded semiconductor structure according to  claim 11 , further comprising:
 a second insulating layer between the second bonding dielectric layer and the second substrate;   a second barrier layer between the second insulating layer and the second bonding dielectric layer; and   a second conductive structure formed in the second substrate and connected to the second bonding pad, wherein a second liner on a surface of the second bonding pad directly contacts the second substrate.   
     
     
         18 . The bonded semiconductor structure according to  claim 11 , wherein a thickness of the first bonding dielectric layer on the first barrier layer is smaller than a thickness of the first insulating layer under the first barrier layer. 
     
     
         19 . The bonded semiconductor structure according to  claim 11 , wherein the first liner on a sidewall of the first bonding pad directly contacts the first insulating layer, the first bonding dielectric layer and the first barrier layer. 
     
     
         20 . The bonded semiconductor structure according to  claim 11 , wherein the first barrier layer comprises a carbon-containing dielectric.