Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths
Abstract
Method for packaging a semiconductor die assemblies. In one embodiment, a method is directed to packaging a semiconductor die assembly having a first die and a plurality of second dies arranged in a stack over the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies. The method can comprise coupling a thermal transfer structure to the peripheral region of the first die and flowing an underfill material between the second dies. The underfill material is flowed after coupling the thermal transfer structure to the peripheral region of the first die such that the thermal transfer structure limits lateral flow of the underfill material.
Claims
exact text as granted — not AI-modifiedI/We claim:
1 . A method of packaging a semiconductor die assembly having a first semiconductor die coupled to a package substrate and a plurality of second semiconductor dies arranged in a stack on the first semiconductor die, wherein the first semiconductor die has a peripheral region extending laterally outward from the stack of second semiconductor dies, the method comprising:
attaching a sidewall of a thermal transfer structure to the peripheral region of the first semiconductor die, wherein the sidewall extends to a height equal to or greater than an elevation of an uppermost one of the second semiconductor dies in the stack, and wherein the sidewall extends around a perimeter of the stack of the second semiconductor dies; depositing an underfill material around the second semiconductor dies; and attaching a top of the thermal transfer structure to the sidewall of the thermal transfer structure, wherein the sidewall and the top of the thermal transfer structure together define a cavity that encloses the stack of the second semiconductor dies.
2 . The method of claim 1 wherein the method further comprises attaching the sidewall of the thermal transfer structure to the package substrate.
3 . The method of claim 1 wherein depositing the underfill material comprises depositing the underfill material into contact with an interior surface of the sidewall.
4 . The method of claim 1 wherein depositing the underfill material comprises depositing the underfill material such that the underfill material has a fillet positioned between the sidewall and the stack of the second semiconductor dies.
5 . The method of claim 1 wherein attaching the sidewall of the thermal transfer structure to the peripheral region of the first semiconductor die comprises attaching the sidewall such that sidewall is spaced apart from the stack of the second semiconductor dies by a gap.
6 . The method of claim 5 wherein depositing the underfill material comprises depositing the underfill material into the gap.
7 . The method of claim 1 wherein attaching the top of the thermal transfer structure to the sidewall of the thermal transfer structure comprises attaching the top to the sidewall via a thermal interface material.
8 . The method of claim 1 wherein attaching the top of the thermal transfer structure to the sidewall of the thermal transfer structure further comprises attaching the top to the uppermost one of the second semiconductor dies via a thermal interface material.
9 . The method of claim 1 wherein the top of the thermal transfer structure has a generally constant thickness in a direction orthogonal to the package substrate.
10 . A method of packaging a semiconductor die assembly having a first semiconductor die coupled to a package substrate and a plurality of second semiconductor dies arranged in a stack on the first semiconductor die, wherein the first semiconductor die has a peripheral region extending laterally outward from the stack of second semiconductor dies, the method comprising:
attaching a foundation of a first portion of a thermal transfer structure to the package substrate and a shoulder of the first portion of the thermal transfer structure to the peripheral region of the first semiconductor die such that (a) the first portion surrounds a perimeter of the first semiconductor die and (b) an upper surface of the first portion is positioned at a height equal to or greater than an elevation of an uppermost one of the second semiconductor dies in the stack; depositing an underfill material around the second semiconductor dies; and attaching a second portion of the thermal transfer structure to the upper surface of the first portion of the thermal transfer structure to enclose the second semiconductor dies in a cavity defined by the first portion and the second portion of the thermal transfer structure.
11 . The method of claim 10 wherein depositing the underfill material around the second semiconductor dies comprises depositing the underfill material through an opening defined in the upper surface of the first portion of the thermal transfer structure.
12 . The method of claim 10 wherein the second portion of the thermal transfer structure has a generally constant thickness in a direction orthogonal to the package substrate.
13 . The method of claim 10 wherein attaching the foundation of the first portion of the thermal transfer structure to the package substrate and the shoulder of the first portion of the thermal transfer structure to the peripheral region of the first semiconductor die comprises attaching the shoulder such that an inner surface of the first portion faces and surrounds the stack of the second semiconductor dies, and wherein depositing the underfill material comprises depositing the underfill material such that the underfill material contacts at least a portion of the inner surface of the first portion.
14 . The method of claim 13 wherein the inner surface extends generally orthogonal to the first semiconductor die.
15 . The method of claim 10 wherein depositing the underfill material comprises depositing the underfill material such that the underfill material has a fillet positioned between the first portion of the thermal transfer structure and the stack of the second semiconductor dies.
16 . The method of claim 10 wherein the method further comprises attaching the second portion of the thermal transfer structure to the uppermost one of the second semiconductor dies in the stack.
17 . The method of claim 10 wherein the upper surface of the first portion is positioned at a height equal to the elevation of the uppermost one of the second semiconductor dies in the stack.
18 . The method of claim 10 wherein the first portion and the second portion of the thermal transfer structure are formed from a metal.
19 . A method of packaging a semiconductor die assembly having a first semiconductor die coupled to a package substrate and a plurality of second semiconductor dies arranged in a stack on the first semiconductor die, wherein the first semiconductor die has a peripheral region extending laterally outward from the stack of second semiconductor dies, the method comprising:
attaching a base of a thermal structure to the package substrate and the peripheral region of the first semiconductor die such that (a) the base surrounds a perimeter of the first semiconductor die and (b) an upper surface of the base is positioned at a height equal to or greater than an elevation of an uppermost one of the second semiconductor dies in the stack; depositing an underfill material, through an opening defined in the upper surface of the base, around the second semiconductor dies; and attaching a cover of the thermal transfer structure to the upper surface of the base of the thermal transfer structure to enclose the second semiconductor dies in a cavity defined by the base and the cover of the thermal transfer structure.
20 . The method of claim 19 wherein attaching the base of the thermal transfer structure to the package substrate and the peripheral region of the first semiconductor die comprises attaching the base such that an inner surface of the base faces and surrounds the stack of the second semiconductor dies, and wherein depositing the underfill material comprises depositing the underfill material such that the underfill material has a fillet (a) positioned between the stack of the second semiconductor dies and the inner surface and (b) that contacts at least a portion of the inner surface.Join the waitlist — get patent alerts
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