Image sensor devices, methods of manufacture thereof, and semiconductor device manufacturing methods

Abstract

Image sensor devices, methods of manufacture thereof, and semiconductor device manufacturing methods are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes bonding a first semiconductor wafer to a second semiconductor wafer, the first semiconductor wafer comprising a substrate and an interconnect structure coupled to the substrate. The method includes removing a portion of the substrate from the first semiconductor wafer to expose a portion of the interconnect structure.

What is claimed is: 
     
       1. A method of manufacturing a semiconductor device, the method comprising:
 bonding a first semiconductor wafer to a second semiconductor wafer, the first semiconductor wafer comprising a substrate and an interconnect structure coupled to the substrate, a bottommost surface of the interconnect structure not extending below a topmost surface of the substrate, the interconnect structure comprising a plurality of insulating layers and a plurality of conductive layers, a conductive layer in a first portion of the interconnect structure being a contact pad of the interconnect structure, the contact pad contacting the topmost surface of the substrate, the contact pad having a first surface coplanar with the bottommost surface of the interconnect structure; and 
 removing a first portion of the substrate from the first semiconductor wafer to expose the first surface of the contact pad in the first portion of the interconnect structure; and 
 removing a second portion of the substrate from the first semiconductor wafer over a scribe line region to expose a second portion of the interconnect structure. 
 
     
     
       2. The method according to  claim 1 , wherein removing the first portion of the substrate comprises removing the portion from over a contact pad region of the interconnect structure. 
     
     
       3. The method according to  claim 1 , wherein the substrate comprises a first substrate, wherein the interconnect structure comprises a first interconnect structure, wherein the second semiconductor wafer comprises a second substrate and a second interconnect structure disposed over the second substrate, and wherein bonding the first semiconductor wafer to the second semiconductor wafer comprises bonding the first interconnect structure to the second interconnect structure. 
     
     
       4. The method according to  claim 1 , wherein the first semiconductor wafer comprises a sensor chip including a pixel array region disposed in the substrate. 
     
     
       5. The method according to  claim 4 , wherein the first semiconductor wafer includes a color filter material disposed over the pixel array region, and a lens material disposed over the color filter material. 
     
     
       6. A method of manufacturing an image sensor device, the method comprising:
 forming a first semiconductor wafer, the forming the first semiconductor wafer comprising; 
 forming an interconnect structure on a substrate, a bottommost surface of the interconnect structure contacting a topmost surface of the substrate, the substrate comprising a central region immediately surrounded by an outer region, the central region comprising a pixel array region disposed in the substrate, the interconnect structure comprising a stack of interconnect layers, the stack extending from the topmost surface of the substrate, a first conductive portion of the interconnect structure contacting the topmost surface of the substrate, the first conductive portion of the interconnect structure having a first surface coplanar with the bottommost surface of the interconnect structure; 
 after forming the first semiconductor wafer, bonding the first semiconductor wafer to a second semiconductor wafer; 
 removing the outer region of the substrate to expose at least the first conductive portion of the interconnect structure outside the central region; and 
 singulating the first semiconductor wafer and the second semiconductor wafer to form a plurality of image sensor devices. 
 
     
     
       7. The method according to  claim 6 , wherein removing the outer region of the substrate comprises removing the substrate proximate a scribe line region, from over a contact pad of the interconnect structure, from over a plurality of contact pads of the interconnect structure, and from over a contact pad region of the interconnect structure. 
     
     
       8. The method according to  claim 6 , wherein bonding the first semiconductor wafer to the second semiconductor wafer comprises a dielectric-to-dielectric bond, a metal-to-metal bond, a metal-to-dielectric bond, or a combination thereof. 
     
     
       9. The method according to  claim 6 , further comprising inverting the first semiconductor wafer, before bonding the first semiconductor wafer to the second semiconductor wafer. 
     
     
       10. The method according to  claim 6 , wherein the second semiconductor wafer includes a plurality of through-vias formed therein. 
     
     
       11. The method according to  claim 10 , further comprising coupling a conductive material to each of the plurality of through-vias of the second semiconductor wafer. 
     
     
       12. The method according to  claim 11 , wherein coupling the conductive material comprises coupling a solder ball, a microbump, a controlled collapse chip connection (C4) bump, or a combination thereof. 
     
     
       13. An image sensor device, comprising:
 a first semiconductor chip, the first semiconductor chip including a first substrate and a first interconnect structure disposed over the first substrate, the first interconnect structure having a topmost surface and a bottommost surface, the topmost surface being distal the first substrate and the bottommost surface contacting a topmost surface of the first substrate; and 
 a second semiconductor chip bonded to the first semiconductor chip in a face to face configuration, the second semiconductor chip including a second interconnect structure and a conductive through via extending from a face surface of the second semiconductor chip through the second semiconductor chip to a back surface of the second semiconductor chip and electrically connecting the first interconnect structure to an external connector on a back side of the second semiconductor chip, a layer of the first interconnect structure of the first semiconductor chip being exposed through the first substrate, the layer being proximate the first substrate relative to at least one other layer of the first interconnect structure, a first exposed portion of the layer including a conductive portion of the first interconnect structure and a second exposed portion of the layer being a scribe line region, the conductive portion of the first exposed portion of the layer having a surface coplanar with the bottommost surface of the first interconnect structure. 
 
     
     
       14. The image sensor device according to  claim 13 , wherein the first exposed portion of the layer of the first interconnect structure of the first semiconductor chip comprises a plurality of contact pads of the first interconnect structure. 
     
     
       15. The image sensor device according to  claim 13 , wherein the second semiconductor chip includes the second interconnect structure coupled to a second substrate, and wherein conductive features, conductive lines, conductive vias, or shallow trench isolation (STI) regions in the first interconnect structure comprise an opposite shape from conductive features, conductive lines, conductive vias, or shallow trench isolation (STI) regions in the second interconnect structure. 
     
     
       16. The image sensor device according to  claim 13 , wherein the first semiconductor chip comprises a sensor chip, and wherein the second semiconductor chip comprises an application specific integrated circuit (ASIC) chip. 
     
     
       17. The image sensor device according to  claim 13 , wherein the image sensor device comprises a stacked complementary metal oxide semiconductor (CMOS) image sensor (CIS) device. 
     
     
       18. The image sensor device according to  claim 13 , wherein the image sensor device comprises a back side illumination (BSI) image sensor device.